src/cpu/sparc/vm/sharedRuntime_sparc.cpp

changeset 739
dc7f315e41f7
parent 631
d1605aabd0a1
child 797
f8199438385b
     1.1 --- a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Tue Aug 26 15:49:40 2008 -0700
     1.2 +++ b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Wed Aug 27 00:21:55 2008 -0700
     1.3 @@ -465,9 +465,7 @@
     1.4  
     1.5      case T_LONG:
     1.6        assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half");
     1.7 -#ifdef COMPILER2
     1.8  #ifdef _LP64
     1.9 -        // Can't be tiered (yet)
    1.10          if (int_reg < int_reg_max) {
    1.11            Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++);
    1.12            regs[i].set2(r->as_VMReg());
    1.13 @@ -476,11 +474,12 @@
    1.14            stk_reg_pairs += 2;
    1.15          }
    1.16  #else
    1.17 +#ifdef COMPILER2
    1.18          // For 32-bit build, can't pass longs in O-regs because they become
    1.19          // I-regs and get trashed.  Use G-regs instead.  G1 and G4 are almost
    1.20          // spare and available.  This convention isn't used by the Sparc ABI or
    1.21          // anywhere else. If we're tiered then we don't use G-regs because c1
    1.22 -        // can't deal with them as a "pair".
    1.23 +        // can't deal with them as a "pair". (Tiered makes this code think g's are filled)
    1.24          // G0: zero
    1.25          // G1: 1st Long arg
    1.26          // G2: global allocated to TLS
    1.27 @@ -500,7 +499,6 @@
    1.28            regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs));
    1.29            stk_reg_pairs += 2;
    1.30          }
    1.31 -#endif // _LP64
    1.32  #else // COMPILER2
    1.33          if (int_reg_pairs + 1 < int_reg_max) {
    1.34            if (is_outgoing) {
    1.35 @@ -514,6 +512,7 @@
    1.36            stk_reg_pairs += 2;
    1.37          }
    1.38  #endif // COMPILER2
    1.39 +#endif // _LP64
    1.40        break;
    1.41  
    1.42      case T_FLOAT:
    1.43 @@ -699,17 +698,16 @@
    1.44  // Stores long into offset pointed to by base
    1.45  void AdapterGenerator::store_c2i_long(Register r, Register base,
    1.46                                        const int st_off, bool is_stack) {
    1.47 -#ifdef COMPILER2
    1.48  #ifdef _LP64
    1.49    // In V9, longs are given 2 64-bit slots in the interpreter, but the
    1.50    // data is passed in only 1 slot.
    1.51    __ stx(r, base, next_arg_slot(st_off));
    1.52  #else
    1.53 +#ifdef COMPILER2
    1.54    // Misaligned store of 64-bit data
    1.55    __ stw(r, base, arg_slot(st_off));    // lo bits
    1.56    __ srlx(r, 32, r);
    1.57    __ stw(r, base, next_arg_slot(st_off));  // hi bits
    1.58 -#endif // _LP64
    1.59  #else
    1.60    if (is_stack) {
    1.61      // Misaligned store of 64-bit data
    1.62 @@ -721,6 +719,7 @@
    1.63      __ stw(r             , base, next_arg_slot(st_off)); // hi bits
    1.64    }
    1.65  #endif // COMPILER2
    1.66 +#endif // _LP64
    1.67    tag_c2i_arg(frame::TagCategory2, base, st_off, r);
    1.68  }
    1.69  
    1.70 @@ -1637,7 +1636,7 @@
    1.71      }
    1.72    } else if (dst.is_single_phys_reg()) {
    1.73      if (src.is_adjacent_aligned_on_stack(2)) {
    1.74 -      __ ld_long(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
    1.75 +      __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
    1.76      } else {
    1.77        // dst is a single reg.
    1.78        // Remember lo is low address not msb for stack slots
    1.79 @@ -1811,7 +1810,6 @@
    1.80                                                  VMRegPair *in_regs,
    1.81                                                  BasicType ret_type) {
    1.82  
    1.83 -
    1.84    // Native nmethod wrappers never take possesion of the oop arguments.
    1.85    // So the caller will gc the arguments. The only thing we need an
    1.86    // oopMap for is if the call is static

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