src/cpu/x86/vm/macroAssembler_x86.hpp

changeset 8307
daaf806995b3
parent 7152
166d744df0de
child 8604
04d83ba48607
child 8877
f04097176542
     1.1 --- a/src/cpu/x86/vm/macroAssembler_x86.hpp	Tue Feb 16 13:56:12 2016 +0000
     1.2 +++ b/src/cpu/x86/vm/macroAssembler_x86.hpp	Wed Feb 17 13:40:12 2016 +0300
     1.3 @@ -1241,6 +1241,25 @@
     1.4                                 Register carry2);
     1.5    void multiply_to_len(Register x, Register xlen, Register y, Register ylen, Register z, Register zlen,
     1.6                         Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5);
     1.7 +
     1.8 +  void square_rshift(Register x, Register len, Register z, Register tmp1, Register tmp3,
     1.9 +                     Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
    1.10 +  void multiply_add_64_bmi2(Register sum, Register op1, Register op2, Register carry,
    1.11 +                            Register tmp2);
    1.12 +  void multiply_add_64(Register sum, Register op1, Register op2, Register carry,
    1.13 +                       Register rdxReg, Register raxReg);
    1.14 +  void add_one_64(Register z, Register zlen, Register carry, Register tmp1);
    1.15 +  void lshift_by_1(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
    1.16 +                       Register tmp3, Register tmp4);
    1.17 +  void square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
    1.18 +                     Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
    1.19 +
    1.20 +  void mul_add_128_x_32_loop(Register out, Register in, Register offset, Register len, Register tmp1,
    1.21 +               Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
    1.22 +               Register raxReg);
    1.23 +  void mul_add(Register out, Register in, Register offset, Register len, Register k, Register tmp1,
    1.24 +               Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
    1.25 +               Register raxReg);
    1.26  #endif
    1.27  
    1.28    // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic.

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