src/cpu/sparc/vm/relocInfo_sparc.cpp

changeset 2657
d673ef06fe96
parent 2314
f95d63e2154a
child 2708
1d1603768966
     1.1 --- a/src/cpu/sparc/vm/relocInfo_sparc.cpp	Fri Mar 18 09:03:43 2011 -0700
     1.2 +++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp	Fri Mar 18 15:52:42 2011 -0700
     1.3 @@ -30,7 +30,7 @@
     1.4  #include "oops/oop.inline.hpp"
     1.5  #include "runtime/safepoint.hpp"
     1.6  
     1.7 -void Relocation::pd_set_data_value(address x, intptr_t o) {
     1.8 +void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
     1.9    NativeInstruction* ip = nativeInstruction_at(addr());
    1.10    jint inst = ip->long_at(0);
    1.11    assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint");
    1.12 @@ -83,7 +83,11 @@
    1.13      guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
    1.14      inst &= ~Assembler::simm(    -1, 13);
    1.15      inst |=  Assembler::simm(simm13, 13);
    1.16 -    ip->set_long_at(0, inst);
    1.17 +    if (verify_only) {
    1.18 +      assert(ip->long_at(0) == inst, "instructions must match");
    1.19 +    } else {
    1.20 +      ip->set_long_at(0, inst);
    1.21 +    }
    1.22      }
    1.23      break;
    1.24  
    1.25 @@ -97,19 +101,36 @@
    1.26        jint np = oopDesc::encode_heap_oop((oop)x);
    1.27        inst &= ~Assembler::hi22(-1);
    1.28        inst |=  Assembler::hi22((intptr_t)np);
    1.29 -      ip->set_long_at(0, inst);
    1.30 +      if (verify_only) {
    1.31 +        assert(ip->long_at(0) == inst, "instructions must match");
    1.32 +      } else {
    1.33 +        ip->set_long_at(0, inst);
    1.34 +      }
    1.35        inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
    1.36        guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
    1.37 -      ip->set_long_at(NativeInstruction::nop_instruction_size, ip->set_data32_simm13( inst2, (intptr_t)np));
    1.38 +      if (verify_only) {
    1.39 +        assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
    1.40 +               "instructions must match");
    1.41 +      } else {
    1.42 +        ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
    1.43 +      }
    1.44        break;
    1.45      }
    1.46 -    ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x );
    1.47 +    if (verify_only) {
    1.48 +      ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x );
    1.49 +    } else {
    1.50 +      ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x );
    1.51 +    }
    1.52  #else
    1.53      guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
    1.54      inst &= ~Assembler::hi22(     -1);
    1.55      inst |=  Assembler::hi22((intptr_t)x);
    1.56      // (ignore offset; it doesn't play into the sethi)
    1.57 -    ip->set_long_at(0, inst);
    1.58 +    if (verify_only) {
    1.59 +      assert(ip->long_at(0) == inst, "instructions must match");
    1.60 +    } else {
    1.61 +      ip->set_long_at(0, inst);
    1.62 +    }
    1.63  #endif
    1.64      }
    1.65      break;

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