1.1 --- a/src/cpu/x86/vm/assembler_x86.cpp Thu Oct 04 08:38:06 2012 -0400
1.2 +++ b/src/cpu/x86/vm/assembler_x86.cpp Thu Oct 04 08:43:14 2012 -0400
1.3 @@ -1170,26 +1170,11 @@
1.4 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,.
1.5 // The ZF is set if the compared values were equal, and cleared otherwise.
1.6 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg
1.7 - if (Atomics & 2) {
1.8 - // caveat: no instructionmark, so this isn't relocatable.
1.9 - // Emit a synthetic, non-atomic, CAS equivalent.
1.10 - // Beware. The synthetic form sets all ICCs, not just ZF.
1.11 - // cmpxchg r,[m] is equivalent to rax, = CAS (m, rax, r)
1.12 - cmpl(rax, adr);
1.13 - movl(rax, adr);
1.14 - if (reg != rax) {
1.15 - Label L ;
1.16 - jcc(Assembler::notEqual, L);
1.17 - movl(adr, reg);
1.18 - bind(L);
1.19 - }
1.20 - } else {
1.21 - InstructionMark im(this);
1.22 - prefix(adr, reg);
1.23 - emit_byte(0x0F);
1.24 - emit_byte(0xB1);
1.25 - emit_operand(reg, adr);
1.26 - }
1.27 + InstructionMark im(this);
1.28 + prefix(adr, reg);
1.29 + emit_byte(0x0F);
1.30 + emit_byte(0xB1);
1.31 + emit_operand(reg, adr);
1.32 }
1.33
1.34 void Assembler::comisd(XMMRegister dst, Address src) {
1.35 @@ -1513,12 +1498,7 @@
1.36 }
1.37
1.38 void Assembler::lock() {
1.39 - if (Atomics & 1) {
1.40 - // Emit either nothing, a NOP, or a NOP: prefix
1.41 - emit_byte(0x90) ;
1.42 - } else {
1.43 - emit_byte(0xF0);
1.44 - }
1.45 + emit_byte(0xF0);
1.46 }
1.47
1.48 void Assembler::lzcntl(Register dst, Register src) {
