1.1 --- a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp Fri Apr 11 09:56:35 2008 -0400 1.2 +++ b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp Sun Apr 13 17:43:42 2008 -0400 1.3 @@ -160,18 +160,24 @@ 1.4 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); 1.5 #endif /* _LP64 */ 1.6 1.7 + 1.8 +#ifdef _LP64 1.9 + int debug_offset = 0; 1.10 +#else 1.11 + int debug_offset = 4; 1.12 +#endif 1.13 // Save the G's 1.14 __ stx(G1, SP, g1_offset+STACK_BIAS); 1.15 - map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + 4)>>2), G1->as_VMReg()); 1.16 + map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg()); 1.17 1.18 __ stx(G3, SP, g3_offset+STACK_BIAS); 1.19 - map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + 4)>>2), G3->as_VMReg()); 1.20 + map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg()); 1.21 1.22 __ stx(G4, SP, g4_offset+STACK_BIAS); 1.23 - map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + 4)>>2), G4->as_VMReg()); 1.24 + map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg()); 1.25 1.26 __ stx(G5, SP, g5_offset+STACK_BIAS); 1.27 - map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + 4)>>2), G5->as_VMReg()); 1.28 + map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg()); 1.29 1.30 // This is really a waste but we'll keep things as they were for now 1.31 if (true) { 1.32 @@ -182,11 +188,11 @@ 1.33 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); 1.34 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); 1.35 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); 1.36 -#endif /* _LP64 */ 1.37 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); 1.38 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); 1.39 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); 1.40 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); 1.41 +#endif /* _LP64 */ 1.42 } 1.43 1.44 1.45 @@ -1217,7 +1223,7 @@ 1.46 1.47 __ verify_oop(O0); 1.48 __ verify_oop(G5_method); 1.49 - __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), G3_scratch); 1.50 + __ load_klass(O0, G3_scratch); 1.51 __ verify_oop(G3_scratch); 1.52 1.53 #if !defined(_LP64) && defined(COMPILER2) 1.54 @@ -1820,7 +1826,7 @@ 1.55 const Register temp_reg = G3_scratch; 1.56 Address ic_miss(temp_reg, SharedRuntime::get_ic_miss_stub()); 1.57 __ verify_oop(O0); 1.58 - __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); 1.59 + __ load_klass(O0, temp_reg); 1.60 __ cmp(temp_reg, G5_inline_cache_reg); 1.61 __ brx(Assembler::equal, true, Assembler::pt, L); 1.62 __ delayed()->nop();