1.1 --- a/src/cpu/x86/vm/vm_version_x86.cpp Tue Jul 02 07:51:31 2013 +0200
1.2 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Tue Jul 02 20:42:12 2013 -0400
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 *
1.9 * This code is free software; you can redistribute it and/or modify it
1.10 @@ -446,6 +446,7 @@
1.11 (supports_avx() ? ", avx" : ""),
1.12 (supports_avx2() ? ", avx2" : ""),
1.13 (supports_aes() ? ", aes" : ""),
1.14 + (supports_clmul() ? ", clmul" : ""),
1.15 (supports_erms() ? ", erms" : ""),
1.16 (supports_mmx_ext() ? ", mmxext" : ""),
1.17 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
1.18 @@ -489,6 +490,27 @@
1.19 FLAG_SET_DEFAULT(UseAES, false);
1.20 }
1.21
1.22 + // Use CLMUL instructions if available.
1.23 + if (supports_clmul()) {
1.24 + if (FLAG_IS_DEFAULT(UseCLMUL)) {
1.25 + UseCLMUL = true;
1.26 + }
1.27 + } else if (UseCLMUL) {
1.28 + if (!FLAG_IS_DEFAULT(UseCLMUL))
1.29 + warning("CLMUL instructions not available on this CPU (AVX may also be required)");
1.30 + FLAG_SET_DEFAULT(UseCLMUL, false);
1.31 + }
1.32 +
1.33 + if (UseCLMUL && (UseAVX > 0) && (UseSSE > 2)) {
1.34 + if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
1.35 + UseCRC32Intrinsics = true;
1.36 + }
1.37 + } else if (UseCRC32Intrinsics) {
1.38 + if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
1.39 + warning("CRC32 Intrinsics requires AVX and CLMUL instructions (not available on this CPU)");
1.40 + FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
1.41 + }
1.42 +
1.43 // The AES intrinsic stubs require AES instruction support (of course)
1.44 // but also require sse3 mode for instructions it use.
1.45 if (UseAES && (UseSSE > 2)) {
