1.1 --- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Tue Jul 02 07:51:31 2013 +0200
1.2 +++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Tue Jul 02 20:42:12 2013 -0400
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 *
1.9 * This code is free software; you can redistribute it and/or modify it
1.10 @@ -2946,6 +2946,9 @@
1.11 }
1.12 }
1.13
1.14 +void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
1.15 + fatal("CRC32 intrinsic is not implemented on this platform");
1.16 +}
1.17
1.18 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
1.19 Register obj = op->obj_opr()->as_register();
