src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp

changeset 2344
ac637b7220d1
parent 2314
f95d63e2154a
child 3435
898522ae3c32
     1.1 --- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Tue Nov 23 13:22:55 2010 -0800
     1.2 +++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Tue Nov 30 23:23:40 2010 -0800
     1.3 @@ -40,33 +40,11 @@
     1.4    //       and then a load or store is emitted with ([O7] + [d]).
     1.5    //
     1.6  
     1.7 -  // some load/store variants return the code_offset for proper positioning of debug info for null checks
     1.8 +  int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned);
     1.9 +  int store(LIR_Opr from_reg, Register base, Register disp, BasicType type, bool wide);
    1.10  
    1.11 -  // load/store with 32 bit displacement
    1.12 -  int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
    1.13 -  void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL);
    1.14 -
    1.15 -  // loadf/storef with 32 bit displacement
    1.16 -  void load(Register s, int disp, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
    1.17 -  void store(FloatRegister d, Register s1, int disp, BasicType st_type, CodeEmitInfo* info = NULL);
    1.18 -
    1.19 -  // convienence methods for calling load/store with an Address
    1.20 -  void load(const Address& a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
    1.21 -  void store(Register d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
    1.22 -  void load(const Address& a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
    1.23 -  void store(FloatRegister d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
    1.24 -
    1.25 -  // convienence methods for calling load/store with an LIR_Address
    1.26 -  void load(LIR_Address* a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
    1.27 -  void store(Register d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
    1.28 -  void load(LIR_Address* a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
    1.29 -  void store(FloatRegister d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
    1.30 -
    1.31 -  int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned = false);
    1.32 -  int store(LIR_Opr from_reg, Register base, Register disp, BasicType type);
    1.33 -
    1.34 -  int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool unaligned = false);
    1.35 -  int load(Register base, Register disp, LIR_Opr to_reg, BasicType type);
    1.36 +  int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned);
    1.37 +  int load(Register base, Register disp, LIR_Opr to_reg, BasicType type, bool wide);
    1.38  
    1.39    void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no);
    1.40  

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