1.1 --- a/src/share/vm/c1/c1_LIRAssembler.cpp Wed Sep 06 00:35:24 2017 -0700 1.2 +++ b/src/share/vm/c1/c1_LIRAssembler.cpp Thu May 24 18:41:44 2018 +0800 1.3 @@ -22,6 +22,12 @@ 1.4 * 1.5 */ 1.6 1.7 +/* 1.8 + * This file has been modified by Loongson Technology in 2015. These 1.9 + * modifications are Copyright (c) 2015 Loongson Technology, and are made 1.10 + * available on the same license terms set forth above. 1.11 + */ 1.12 + 1.13 #include "precompiled.hpp" 1.14 #include "c1/c1_Compilation.hpp" 1.15 #include "c1/c1_Instruction.hpp" 1.16 @@ -34,6 +40,10 @@ 1.17 # include "nativeInst_x86.hpp" 1.18 # include "vmreg_x86.inline.hpp" 1.19 #endif 1.20 +#ifdef TARGET_ARCH_mips 1.21 +# include "nativeInst_mips.hpp" 1.22 +# include "vmreg_mips.inline.hpp" 1.23 +#endif 1.24 #ifdef TARGET_ARCH_sparc 1.25 # include "nativeInst_sparc.hpp" 1.26 # include "vmreg_sparc.inline.hpp" 1.27 @@ -715,6 +725,7 @@ 1.28 1.29 void LIR_Assembler::emit_op2(LIR_Op2* op) { 1.30 switch (op->code()) { 1.31 +#ifndef MIPS64 1.32 case lir_cmp: 1.33 if (op->info() != NULL) { 1.34 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(), 1.35 @@ -723,6 +734,15 @@ 1.36 } 1.37 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op); 1.38 break; 1.39 +#else 1.40 + case lir_null_check_for_branch: 1.41 + if (op->info() != NULL) { 1.42 + assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(), 1.43 + "shouldn't be codeemitinfo for non-address operands"); 1.44 + add_debug_info_for_null_check_here(op->info()); // exception possible 1.45 + } 1.46 + break; 1.47 +#endif 1.48 1.49 case lir_cmp_l2i: 1.50 case lir_cmp_fd2i: 1.51 @@ -731,7 +751,9 @@ 1.52 break; 1.53 1.54 case lir_cmove: 1.55 +#ifndef MIPS64 1.56 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type()); 1.57 +#endif 1.58 break; 1.59 1.60 case lir_shl: