src/cpu/x86/vm/vmreg_x86.inline.hpp

changeset 435
a61af66fc99e
child 1907
c18cbe5936b8
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/cpu/x86/vm/vmreg_x86.inline.hpp	Sat Dec 01 00:00:00 2007 +0000
     1.3 @@ -0,0 +1,84 @@
     1.4 +/*
     1.5 + * Copyright 2006-2007 Sun Microsystems, Inc.  All Rights Reserved.
     1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     1.7 + *
     1.8 + * This code is free software; you can redistribute it and/or modify it
     1.9 + * under the terms of the GNU General Public License version 2 only, as
    1.10 + * published by the Free Software Foundation.
    1.11 + *
    1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
    1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    1.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    1.15 + * version 2 for more details (a copy is included in the LICENSE file that
    1.16 + * accompanied this code).
    1.17 + *
    1.18 + * You should have received a copy of the GNU General Public License version
    1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
    1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    1.21 + *
    1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
    1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
    1.24 + * have any questions.
    1.25 + *
    1.26 + */
    1.27 +
    1.28 +inline VMReg RegisterImpl::as_VMReg() {
    1.29 +  if( this==noreg ) return VMRegImpl::Bad();
    1.30 +#ifdef AMD64
    1.31 +  return VMRegImpl::as_VMReg(encoding() << 1 );
    1.32 +#else
    1.33 +  return VMRegImpl::as_VMReg(encoding() );
    1.34 +#endif // AMD64
    1.35 +}
    1.36 +
    1.37 +inline VMReg FloatRegisterImpl::as_VMReg() {
    1.38 +  return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
    1.39 +}
    1.40 +
    1.41 +inline VMReg XMMRegisterImpl::as_VMReg() {
    1.42 +  return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_fpr);
    1.43 +}
    1.44 +
    1.45 +
    1.46 +inline bool VMRegImpl::is_Register() {
    1.47 +  return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
    1.48 +}
    1.49 +
    1.50 +inline bool VMRegImpl::is_FloatRegister() {
    1.51 +  return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
    1.52 +}
    1.53 +
    1.54 +inline bool VMRegImpl::is_XMMRegister() {
    1.55 +  return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
    1.56 +}
    1.57 +
    1.58 +inline Register VMRegImpl::as_Register() {
    1.59 +
    1.60 +  assert( is_Register(), "must be");
    1.61 +  // Yuk
    1.62 +#ifdef AMD64
    1.63 +  return ::as_Register(value() >> 1);
    1.64 +#else
    1.65 +  return ::as_Register(value());
    1.66 +#endif // AMD64
    1.67 +}
    1.68 +
    1.69 +inline FloatRegister VMRegImpl::as_FloatRegister() {
    1.70 +  assert( is_FloatRegister() && is_even(value()), "must be" );
    1.71 +  // Yuk
    1.72 +  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
    1.73 +}
    1.74 +
    1.75 +inline XMMRegister VMRegImpl::as_XMMRegister() {
    1.76 +  assert( is_XMMRegister() && is_even(value()), "must be" );
    1.77 +  // Yuk
    1.78 +  return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 1);
    1.79 +}
    1.80 +
    1.81 +inline   bool VMRegImpl::is_concrete() {
    1.82 +  assert(is_reg(), "must be");
    1.83 +#ifndef AMD64
    1.84 +  if (is_Register()) return true;
    1.85 +#endif // AMD64
    1.86 +  return is_even(value());
    1.87 +}

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