1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/x86/vm/c1_FrameMap_x86.hpp Sat Dec 01 00:00:00 2007 +0000
1.3 @@ -0,0 +1,91 @@
1.4 +/*
1.5 + * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
1.24 + * have any questions.
1.25 + *
1.26 + */
1.27 +
1.28 +// On i486 the frame looks as follows:
1.29 +//
1.30 +// +-----------------------------+---------+----------------------------------------+----------------+-----------
1.31 +// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
1.32 +// +-----------------------------+---------+----------------------------------------+----------------+-----------
1.33 +//
1.34 +// The FPU registers are mapped with their offset from TOS; therefore the
1.35 +// status of FPU stack must be updated during code emission.
1.36 +
1.37 + public:
1.38 + static const int pd_c_runtime_reserved_arg_size;
1.39 +
1.40 + enum {
1.41 + nof_xmm_regs = pd_nof_xmm_regs_frame_map,
1.42 + nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,
1.43 + first_available_sp_in_frame = 0,
1.44 + frame_pad_in_bytes = 8,
1.45 + nof_reg_args = 2
1.46 + };
1.47 +
1.48 + private:
1.49 + static LIR_Opr _caller_save_xmm_regs [nof_caller_save_xmm_regs];
1.50 +
1.51 + static XMMRegister _xmm_regs[nof_xmm_regs];
1.52 +
1.53 + public:
1.54 + static LIR_Opr receiver_opr;
1.55 +
1.56 + static LIR_Opr rsi_opr;
1.57 + static LIR_Opr rdi_opr;
1.58 + static LIR_Opr rbx_opr;
1.59 + static LIR_Opr rax_opr;
1.60 + static LIR_Opr rdx_opr;
1.61 + static LIR_Opr rcx_opr;
1.62 + static LIR_Opr rsp_opr;
1.63 + static LIR_Opr rbp_opr;
1.64 +
1.65 + static LIR_Opr rsi_oop_opr;
1.66 + static LIR_Opr rdi_oop_opr;
1.67 + static LIR_Opr rbx_oop_opr;
1.68 + static LIR_Opr rax_oop_opr;
1.69 + static LIR_Opr rdx_oop_opr;
1.70 + static LIR_Opr rcx_oop_opr;
1.71 +
1.72 + static LIR_Opr rax_rdx_long_opr;
1.73 + static LIR_Opr rbx_rcx_long_opr;
1.74 + static LIR_Opr fpu0_float_opr;
1.75 + static LIR_Opr fpu0_double_opr;
1.76 + static LIR_Opr xmm0_float_opr;
1.77 + static LIR_Opr xmm0_double_opr;
1.78 +
1.79 + static LIR_Opr as_long_opr(Register r, Register r2) {
1.80 + return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
1.81 + }
1.82 +
1.83 + // VMReg name for spilled physical FPU stack slot n
1.84 + static VMReg fpu_regname (int n);
1.85 +
1.86 + static XMMRegister nr2xmmreg(int rnr);
1.87 +
1.88 + static bool is_caller_save_register (LIR_Opr opr) { return true; }
1.89 + static bool is_caller_save_register (Register r) { return true; }
1.90 +
1.91 + static LIR_Opr caller_save_xmm_reg_at(int i) {
1.92 + assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");
1.93 + return _caller_save_xmm_regs[i];
1.94 + }
