src/cpu/x86/vm/assembler_x86_64.inline.hpp

changeset 435
a61af66fc99e
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/cpu/x86/vm/assembler_x86_64.inline.hpp	Sat Dec 01 00:00:00 2007 +0000
     1.3 @@ -0,0 +1,86 @@
     1.4 +/*
     1.5 + * Copyright 2003-2005 Sun Microsystems, Inc.  All Rights Reserved.
     1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     1.7 + *
     1.8 + * This code is free software; you can redistribute it and/or modify it
     1.9 + * under the terms of the GNU General Public License version 2 only, as
    1.10 + * published by the Free Software Foundation.
    1.11 + *
    1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
    1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    1.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    1.15 + * version 2 for more details (a copy is included in the LICENSE file that
    1.16 + * accompanied this code).
    1.17 + *
    1.18 + * You should have received a copy of the GNU General Public License version
    1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
    1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    1.21 + *
    1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
    1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
    1.24 + * have any questions.
    1.25 + *
    1.26 + */
    1.27 +
    1.28 +inline void Assembler::emit_long64(jlong x) {
    1.29 +  *(jlong*) _code_pos = x;
    1.30 +  _code_pos += sizeof(jlong);
    1.31 +  code_section()->set_end(_code_pos);
    1.32 +}
    1.33 +
    1.34 +inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
    1.35 +  unsigned char op = branch[0];
    1.36 +  assert(op == 0xE8 /* call */ ||
    1.37 +         op == 0xE9 /* jmp */ ||
    1.38 +         op == 0xEB /* short jmp */ ||
    1.39 +         (op & 0xF0) == 0x70 /* short jcc */ ||
    1.40 +         op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */,
    1.41 +         "Invalid opcode at patch point");
    1.42 +
    1.43 +  if (op == 0xEB || (op & 0xF0) == 0x70) {
    1.44 +    // short offset operators (jmp and jcc)
    1.45 +    char* disp = (char*) &branch[1];
    1.46 +    int imm8 = target - (address) &disp[1];
    1.47 +    guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset");
    1.48 +    *disp = imm8;
    1.49 +  } else {
    1.50 +    int* disp = (int*) &branch[(op == 0x0F)? 2: 1];
    1.51 +    int imm32 = target - (address) &disp[1];
    1.52 +    *disp = imm32;
    1.53 +  }
    1.54 +}
    1.55 +
    1.56 +#ifndef PRODUCT
    1.57 +inline void MacroAssembler::pd_print_patched_instruction(address branch) {
    1.58 +  const char* s;
    1.59 +  unsigned char op = branch[0];
    1.60 +  if (op == 0xE8) {
    1.61 +    s = "call";
    1.62 +  } else if (op == 0xE9 || op == 0xEB) {
    1.63 +    s = "jmp";
    1.64 +  } else if ((op & 0xF0) == 0x70) {
    1.65 +    s = "jcc";
    1.66 +  } else if (op == 0x0F) {
    1.67 +    s = "jcc";
    1.68 +  } else {
    1.69 +    s = "????";
    1.70 +  }
    1.71 +  tty->print("%s (unresolved)", s);
    1.72 +}
    1.73 +#endif // ndef PRODUCT
    1.74 +
    1.75 +inline void MacroAssembler::movptr(Address dst, intptr_t src) {
    1.76 +#ifdef _LP64
    1.77 +  Assembler::mov64(dst, src);
    1.78 +#else
    1.79 +  Assembler::movl(dst, src);
    1.80 +#endif // _LP64
    1.81 +}
    1.82 +
    1.83 +inline void MacroAssembler::movptr(Register dst, intptr_t src) {
    1.84 +#ifdef _LP64
    1.85 +  Assembler::mov64(dst, src);
    1.86 +#else
    1.87 +  Assembler::movl(dst, src);
    1.88 +#endif // _LP64
    1.89 +}

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