1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/sparc/vm/frame_sparc.hpp Sat Dec 01 00:00:00 2007 +0000
1.3 @@ -0,0 +1,312 @@
1.4 +/*
1.5 + * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
1.24 + * have any questions.
1.25 + *
1.26 + */
1.27 +
1.28 +// A frame represents a physical stack frame (an activation). Frames can be
1.29 +// C or Java frames, and the Java frames can be interpreted or compiled.
1.30 +// In contrast, vframes represent source-level activations, so that one physical frame
1.31 +// can correspond to multiple source level frames because of inlining.
1.32 +// A frame is comprised of {pc, sp, younger_sp}
1.33 +
1.34 +
1.35 +// Layout of asm interpreter frame:
1.36 +//
1.37 +// 0xfffffff
1.38 +// ......
1.39 +// [last extra incoming arg, (local # Nargs > 6 ? Nargs-1 : undef)]
1.40 +// .. Note: incoming args are copied to local frame area upon entry
1.41 +// [first extra incoming arg, (local # Nargs > 6 ? 6 : undef)]
1.42 +// [6 words for C-arg storage (unused)] Are this and next one really needed?
1.43 +// [C-aggregate-word (unused)] Yes, if want extra params to be in same place as C convention
1.44 +// [16 words for register saving] <--- FP
1.45 +// [interpreter_frame_vm_locals ] (see below)
1.46 +
1.47 +// Note: Llocals is always double-word aligned
1.48 +// [first local i.e. local # 0] <-- Llocals
1.49 +// ...
1.50 +// [last local, i.e. local # Nlocals-1]
1.51 +
1.52 +// [monitors ]
1.53 +// ....
1.54 +// [monitors ] <-- Lmonitors (same as Llocals + 6*4 if none)
1.55 +// (must be double-word aligned because
1.56 +// monitor element size is constrained to
1.57 +// doubleword)
1.58 +//
1.59 +// <-- Lesp (points 1 past TOS)
1.60 +// [bottom word used for stack ]
1.61 +// ...
1.62 +// [top word used for stack] (first word of stack is double-word aligned)
1.63 +
1.64 +// [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)]
1.65 +// [6 words for C-arg storage]
1.66 +// [C-aggregate-word (unused)]
1.67 +// [16 words for register saving] <--- SP
1.68 +// ...
1.69 +// 0x0000000
1.70 +//
1.71 +// The in registers and local registers are preserved in a block at SP.
1.72 +//
1.73 +// The first six in registers (I0..I5) hold the first six locals.
1.74 +// The locals are used as follows:
1.75 +// Lesp first free element of expression stack
1.76 +// (which grows towards __higher__ addresses)
1.77 +// Lbcp is set to address of bytecode to execute
1.78 +// It is accessed in the frame under the name "bcx".
1.79 +// It may at times (during GC) be an index instead.
1.80 +// Lmethod the method being interpreted
1.81 +// Llocals the base pointer for accessing the locals array
1.82 +// (lower-numbered locals have lower addresses)
1.83 +// Lmonitors the base pointer for accessing active monitors
1.84 +// Lcache a saved pointer to the method's constant pool cache
1.85 +//
1.86 +//
1.87 +// When calling out to another method,
1.88 +// G5_method is set to method to call, G5_inline_cache_klass may be set,
1.89 +// parameters are put in O registers, and also extra parameters
1.90 +// must be cleverly copied from the top of stack to the outgoing param area in the frame,
1.91 +// ------------------------------ C++ interpreter ----------------------------------------
1.92 +// Layout of C++ interpreter frame:
1.93 +//
1.94 +
1.95 +
1.96 +
1.97 +// All frames:
1.98 +
1.99 + public:
1.100 +
1.101 + enum {
1.102 + // normal return address is 2 words past PC
1.103 + pc_return_offset = 2 * BytesPerInstWord,
1.104 +
1.105 + // size of each block, in order of increasing address:
1.106 + register_save_words = 16,
1.107 +#ifdef _LP64
1.108 + callee_aggregate_return_pointer_words = 0,
1.109 +#else
1.110 + callee_aggregate_return_pointer_words = 1,
1.111 +#endif
1.112 + callee_register_argument_save_area_words = 6,
1.113 + // memory_parameter_words = <arbitrary>,
1.114 +
1.115 + // offset of each block, in order of increasing address:
1.116 + // (note: callee_register_argument_save_area_words == Assembler::n_register_parameters)
1.117 + register_save_words_sp_offset = 0,
1.118 + callee_aggregate_return_pointer_sp_offset = register_save_words_sp_offset + register_save_words,
1.119 + callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words,
1.120 + memory_parameter_word_sp_offset = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words,
1.121 + varargs_offset = memory_parameter_word_sp_offset
1.122 + };
1.123 +
1.124 + private:
1.125 + intptr_t* _younger_sp; // optional SP of callee (used to locate O7)
1.126 + int _sp_adjustment_by_callee; // adjustment in words to SP by callee for making locals contiguous
1.127 +
1.128 + // Note: On SPARC, unlike Intel, the saved PC for a stack frame
1.129 + // is stored at a __variable__ distance from that frame's SP.
1.130 + // (In fact, it may be in the register save area of the callee frame,
1.131 + // but that fact need not bother us.) Thus, we must store the
1.132 + // address of that saved PC explicitly. On the other hand, SPARC
1.133 + // stores the FP for a frame at a fixed offset from the frame's SP,
1.134 + // so there is no need for a separate "frame::_fp" field.
1.135 +
1.136 + public:
1.137 + // Accessors
1.138 +
1.139 + intptr_t* younger_sp() const {
1.140 + assert(_younger_sp != NULL, "frame must possess a younger_sp");
1.141 + return _younger_sp;
1.142 + }
1.143 +
1.144 + int callee_sp_adjustment() const { return _sp_adjustment_by_callee; }
1.145 + void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; }
1.146 +
1.147 + // Constructors
1.148 +
1.149 + // This constructor relies on the fact that the creator of a frame
1.150 + // has flushed register windows which the frame will refer to, and
1.151 + // that those register windows will not be reloaded until the frame is
1.152 + // done reading and writing the stack. Moreover, if the "younger_sp"
1.153 + // argument points into the register save area of the next younger
1.154 + // frame (though it need not), the register window for that next
1.155 + // younger frame must also stay flushed. (The caller is responsible
1.156 + // for ensuring this.)
1.157 +
1.158 + frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false);
1.159 +
1.160 + // make a deficient frame which doesn't know where its PC is:
1.161 + enum unpatchable_t { unpatchable };
1.162 + frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL);
1.163 +
1.164 + // Walk from sp outward looking for old_sp, and return old_sp's predecessor
1.165 + // (i.e. return the sp from the frame where old_sp is the fp).
1.166 + // Register windows are assumed to be flushed for the stack in question.
1.167 +
1.168 + static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp);
1.169 +
1.170 + // Return true if sp is a younger sp in the stack described by valid_sp.
1.171 + static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp);
1.172 +
1.173 + public:
1.174 + // accessors for the instance variables
1.175 + intptr_t* fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); }
1.176 +
1.177 + // All frames
1.178 +
1.179 + intptr_t* fp_addr_at(int index) const { return &fp()[index]; }
1.180 + intptr_t* sp_addr_at(int index) const { return &sp()[index]; }
1.181 + intptr_t fp_at( int index) const { return *fp_addr_at(index); }
1.182 + intptr_t sp_at( int index) const { return *sp_addr_at(index); }
1.183 +
1.184 + private:
1.185 + inline address* I7_addr() const;
1.186 + inline address* O7_addr() const;
1.187 +
1.188 + inline address* I0_addr() const;
1.189 + inline address* O0_addr() const;
1.190 + intptr_t* younger_sp_addr_at(int index) const { return &younger_sp()[index]; }
1.191 +
1.192 + public:
1.193 + // access to SPARC arguments and argument registers
1.194 +
1.195 + // Assumes reg is an in/local register
1.196 + intptr_t* register_addr(Register reg) const {
1.197 + return sp_addr_at(reg->sp_offset_in_saved_window());
1.198 + }
1.199 +
1.200 + // Assumes reg is an out register
1.201 + intptr_t* out_register_addr(Register reg) const {
1.202 + return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window());
1.203 + }
1.204 + intptr_t* memory_param_addr(int param_ix, bool is_in) const {
1.205 + int offset = callee_register_argument_save_area_sp_offset + param_ix;
1.206 + if (is_in)
1.207 + return fp_addr_at(offset);
1.208 + else
1.209 + return sp_addr_at(offset);
1.210 + }
1.211 + intptr_t* param_addr(int param_ix, bool is_in) const {
1.212 + if (param_ix >= callee_register_argument_save_area_words)
1.213 + return memory_param_addr(param_ix, is_in);
1.214 + else if (is_in)
1.215 + return register_addr(Argument(param_ix, true).as_register());
1.216 + else {
1.217 + // the registers are stored in the next younger frame
1.218 + // %%% is this really necessary?
1.219 + ShouldNotReachHere();
1.220 + return NULL;
1.221 + }
1.222 + }
1.223 +
1.224 +
1.225 + // Interpreter frames
1.226 +
1.227 + public:
1.228 + // Asm interpreter
1.229 +#ifndef CC_INTERP
1.230 + enum interpreter_frame_vm_locals {
1.231 + // 2 words, also used to save float regs across calls to C
1.232 + interpreter_frame_d_scratch_fp_offset = -2,
1.233 + interpreter_frame_l_scratch_fp_offset = -4,
1.234 + interpreter_frame_padding_offset = -5, // for native calls only
1.235 + interpreter_frame_oop_temp_offset = -6, // for native calls only
1.236 + interpreter_frame_vm_locals_fp_offset = -6, // should be same as above, and should be zero mod 8
1.237 +
1.238 + interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset,
1.239 +
1.240 +
1.241 + // interpreter frame set-up needs to save 2 extra words in outgoing param area
1.242 + // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_
1.243 +
1.244 + interpreter_frame_extra_outgoing_argument_words = 2
1.245 + };
1.246 +#else
1.247 + enum interpreter_frame_vm_locals {
1.248 + // 2 words, also used to save float regs across calls to C
1.249 + interpreter_state_ptr_offset = 0, // Is in L0 (Lstate) in save area
1.250 + interpreter_frame_mirror_offset = 1, // Is in L1 (Lmirror) in save area (for native calls only)
1.251 +
1.252 + // interpreter frame set-up needs to save 2 extra words in outgoing param area
1.253 + // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_
1.254 +
1.255 + interpreter_frame_extra_outgoing_argument_words = 2
1.256 + };
1.257 +#endif /* CC_INTERP */
1.258 +
1.259 + // the compiler frame has many of the same fields as the interpreter frame
1.260 + // %%%%% factor out declarations of the shared fields
1.261 + enum compiler_frame_fixed_locals {
1.262 + compiler_frame_d_scratch_fp_offset = -2,
1.263 + compiler_frame_vm_locals_fp_offset = -2, // should be same as above
1.264 +
1.265 + compiler_frame_vm_local_words = -compiler_frame_vm_locals_fp_offset
1.266 + };
1.267 +
1.268 + private:
1.269 +
1.270 + constantPoolCacheOop* frame::interpreter_frame_cpoolcache_addr() const;
1.271 +
1.272 +#ifndef CC_INTERP
1.273 +
1.274 + // where Lmonitors is saved:
1.275 + BasicObjectLock** interpreter_frame_monitors_addr() const {
1.276 + return (BasicObjectLock**) sp_addr_at(Lmonitors->sp_offset_in_saved_window());
1.277 + }
1.278 + intptr_t** interpreter_frame_esp_addr() const {
1.279 + return (intptr_t**)sp_addr_at(Lesp->sp_offset_in_saved_window());
1.280 + }
1.281 +
1.282 + inline void interpreter_frame_set_tos_address(intptr_t* x);
1.283 +
1.284 +
1.285 + // %%%%% Another idea: instead of defining 3 fns per item, just define one returning a ref
1.286 +
1.287 + // monitors:
1.288 +
1.289 + // next two fns read and write Lmonitors value,
1.290 + private:
1.291 + BasicObjectLock* interpreter_frame_monitors() const { return *interpreter_frame_monitors_addr(); }
1.292 + void interpreter_frame_set_monitors(BasicObjectLock* monitors) { *interpreter_frame_monitors_addr() = monitors; }
1.293 +#else
1.294 + public:
1.295 + inline interpreterState get_interpreterState() const {
1.296 + return ((interpreterState)sp_at(interpreter_state_ptr_offset));
1.297 + }
1.298 +
1.299 +
1.300 +#endif /* CC_INTERP */
1.301 +
1.302 +
1.303 +
1.304 + // Compiled frames
1.305 +
1.306 + public:
1.307 + // Tells if this register can hold 64 bits on V9 (really, V8+).
1.308 + static bool holds_a_doubleword(Register reg) {
1.309 +#ifdef _LP64
1.310 + // return true;
1.311 + return reg->is_out() || reg->is_global();
1.312 +#else
1.313 + return reg->is_out() || reg->is_global();
1.314 +#endif
1.315 + }
