src/cpu/sparc/vm/c1_Defs_sparc.hpp

changeset 435
a61af66fc99e
child 1363
d0acbc302e14
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/src/cpu/sparc/vm/c1_Defs_sparc.hpp	Sat Dec 01 00:00:00 2007 +0000
     1.3 @@ -0,0 +1,67 @@
     1.4 +/*
     1.5 + * Copyright 2000-2005 Sun Microsystems, Inc.  All Rights Reserved.
     1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     1.7 + *
     1.8 + * This code is free software; you can redistribute it and/or modify it
     1.9 + * under the terms of the GNU General Public License version 2 only, as
    1.10 + * published by the Free Software Foundation.
    1.11 + *
    1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
    1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    1.14 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    1.15 + * version 2 for more details (a copy is included in the LICENSE file that
    1.16 + * accompanied this code).
    1.17 + *
    1.18 + * You should have received a copy of the GNU General Public License version
    1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
    1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
    1.21 + *
    1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
    1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
    1.24 + * have any questions.
    1.25 + *
    1.26 + */
    1.27 +
    1.28 +// native word offsets from memory address (big endian)
    1.29 +enum {
    1.30 +  pd_lo_word_offset_in_bytes = BytesPerInt,
    1.31 +  pd_hi_word_offset_in_bytes = 0
    1.32 +};
    1.33 +
    1.34 +
    1.35 +// explicit rounding operations are not required to implement the strictFP mode
    1.36 +enum {
    1.37 +  pd_strict_fp_requires_explicit_rounding = false
    1.38 +};
    1.39 +
    1.40 +
    1.41 +// registers
    1.42 +enum {
    1.43 +  pd_nof_cpu_regs_frame_map = 32,  // number of registers used during code emission
    1.44 +  pd_nof_caller_save_cpu_regs_frame_map = 6,  // number of cpu registers killed by calls
    1.45 +  pd_nof_cpu_regs_reg_alloc = 20,  // number of registers that are visible to register allocator
    1.46 +  pd_nof_cpu_regs_linearscan = 32,// number of registers visible linear scan
    1.47 +  pd_first_cpu_reg = 0,
    1.48 +  pd_last_cpu_reg = 31,
    1.49 +  pd_last_allocatable_cpu_reg = 19,
    1.50 +  pd_first_callee_saved_reg = 0,
    1.51 +  pd_last_callee_saved_reg = 13,
    1.52 +
    1.53 +  pd_nof_fpu_regs_frame_map = 32,  // number of registers used during code emission
    1.54 +  pd_nof_caller_save_fpu_regs_frame_map = 32,  // number of fpu registers killed by calls
    1.55 +  pd_nof_fpu_regs_reg_alloc = 32,  // number of registers that are visible to register allocator
    1.56 +  pd_nof_fpu_regs_linearscan = 32, // number of registers visible to linear scan
    1.57 +  pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
    1.58 +  pd_last_fpu_reg =  pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map - 1,
    1.59 +
    1.60 +  pd_nof_xmm_regs_linearscan = 0,
    1.61 +  pd_nof_caller_save_xmm_regs = 0,
    1.62 +  pd_first_xmm_reg = -1,
    1.63 +  pd_last_xmm_reg = -1
    1.64 +};
    1.65 +
    1.66 +
    1.67 +// for debug info: a float value in a register is saved in single precision by runtime stubs
    1.68 +enum {
    1.69 +  pd_float_saved_as_double = false
    1.70 +};

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