1.1 --- a/src/cpu/x86/vm/x86_64.ad Thu Nov 06 20:00:03 2008 -0800
1.2 +++ b/src/cpu/x86/vm/x86_64.ad Fri Nov 07 09:29:38 2008 -0800
1.3 @@ -3572,7 +3572,7 @@
1.4 // at [FETCH], below, will never observe a biased encoding (*101b).
1.5 // If this invariant is not held we'll suffer exclusion (safety) failure.
1.6
1.7 - if (UseBiasedLocking) {
1.8 + if (UseBiasedLocking && !UseOptoBiasInlining) {
1.9 masm.biased_locking_enter(boxReg, objReg, tmpReg, scrReg, true, DONE_LABEL, NULL, _counters);
1.10 masm.movptr(tmpReg, Address(objReg, 0)) ; // [FETCH]
1.11 }
1.12 @@ -3660,7 +3660,7 @@
1.13 } else {
1.14 Label DONE_LABEL, Stacked, CheckSucc ;
1.15
1.16 - if (UseBiasedLocking) {
1.17 + if (UseBiasedLocking && !UseOptoBiasInlining) {
1.18 masm.biased_locking_exit(objReg, tmpReg, DONE_LABEL);
1.19 }
1.20
1.21 @@ -7845,7 +7845,7 @@
1.22 rFlagsReg cr)
1.23 %{
1.24 match(Set cr (StorePConditional heap_top_ptr (Binary oldval newval)));
1.25 -
1.26 +
1.27 format %{ "cmpxchgq $heap_top_ptr, $newval\t# (ptr) "
1.28 "If rax == $heap_top_ptr then store $newval into $heap_top_ptr" %}
1.29 opcode(0x0F, 0xB1);
1.30 @@ -7856,53 +7856,40 @@
1.31 ins_pipe(pipe_cmpxchg);
1.32 %}
1.33
1.34 -// Conditional-store of a long value
1.35 -// Returns a boolean value (0/1) on success. Implemented with a
1.36 -// CMPXCHG8 on Intel. mem_ptr can actually be in either RSI or RDI
1.37 -
1.38 -instruct storeLConditional(rRegI res,
1.39 - memory mem_ptr,
1.40 - rax_RegL oldval, rRegL newval,
1.41 - rFlagsReg cr)
1.42 -%{
1.43 - match(Set res (StoreLConditional mem_ptr (Binary oldval newval)));
1.44 - effect(KILL cr);
1.45 -
1.46 - format %{ "cmpxchgq $mem_ptr, $newval\t# (long) "
1.47 - "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
1.48 - "sete $res\n\t"
1.49 - "movzbl $res, $res" %}
1.50 +// Conditional-store of an int value.
1.51 +// ZF flag is set on success, reset otherwise. Implemented with a CMPXCHG.
1.52 +instruct storeIConditional(memory mem, rax_RegI oldval, rRegI newval, rFlagsReg cr)
1.53 +%{
1.54 + match(Set cr (StoreIConditional mem (Binary oldval newval)));
1.55 + effect(KILL oldval);
1.56 +
1.57 + format %{ "cmpxchgl $mem, $newval\t# If rax == $mem then store $newval into $mem" %}
1.58 opcode(0x0F, 0xB1);
1.59 ins_encode(lock_prefix,
1.60 - REX_reg_mem_wide(newval, mem_ptr),
1.61 + REX_reg_mem(newval, mem),
1.62 OpcP, OpcS,
1.63 - reg_mem(newval, mem_ptr),
1.64 - REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
1.65 - REX_reg_breg(res, res), // movzbl
1.66 - Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
1.67 + reg_mem(newval, mem));
1.68 ins_pipe(pipe_cmpxchg);
1.69 %}
1.70
1.71 -// Conditional-store of a long value
1.72 -// ZF flag is set on success, reset otherwise. Implemented with a
1.73 -// CMPXCHG8 on Intel. mem_ptr can actually be in either RSI or RDI
1.74 -instruct storeLConditional_flags(memory mem_ptr,
1.75 - rax_RegL oldval, rRegL newval,
1.76 - rFlagsReg cr,
1.77 - immI0 zero)
1.78 -%{
1.79 - match(Set cr (CmpI (StoreLConditional mem_ptr (Binary oldval newval)) zero));
1.80 -
1.81 - format %{ "cmpxchgq $mem_ptr, $newval\t# (long) "
1.82 - "If rax == $mem_ptr then store $newval into $mem_ptr" %}
1.83 +// Conditional-store of a long value.
1.84 +// ZF flag is set on success, reset otherwise. Implemented with a CMPXCHG.
1.85 +instruct storeLConditional(memory mem, rax_RegL oldval, rRegL newval, rFlagsReg cr)
1.86 +%{
1.87 + match(Set cr (StoreLConditional mem (Binary oldval newval)));
1.88 + effect(KILL oldval);
1.89 +
1.90 + format %{ "cmpxchgq $mem, $newval\t# If rax == $mem then store $newval into $mem" %}
1.91 opcode(0x0F, 0xB1);
1.92 ins_encode(lock_prefix,
1.93 - REX_reg_mem_wide(newval, mem_ptr),
1.94 + REX_reg_mem_wide(newval, mem),
1.95 OpcP, OpcS,
1.96 - reg_mem(newval, mem_ptr));
1.97 + reg_mem(newval, mem));
1.98 ins_pipe(pipe_cmpxchg);
1.99 %}
1.100
1.101 +
1.102 +// XXX No flag versions for CompareAndSwap{P,I,L} because matcher can't match them
1.103 instruct compareAndSwapP(rRegI res,
1.104 memory mem_ptr,
1.105 rax_RegP oldval, rRegP newval,
1.106 @@ -7926,7 +7913,6 @@
1.107 ins_pipe( pipe_cmpxchg );
1.108 %}
1.109
1.110 -// XXX No flag versions for CompareAndSwap{P,I,L} because matcher can't match them
1.111 instruct compareAndSwapL(rRegI res,
1.112 memory mem_ptr,
1.113 rax_RegL oldval, rRegL newval,
1.114 @@ -8876,6 +8862,7 @@
1.115 ins_pipe(ialu_reg);
1.116 %}
1.117
1.118 +
1.119 // Logical Shift Right by 8-bit immediate
1.120 instruct shrL_mem_imm(memory dst, immI8 shift, rFlagsReg cr)
1.121 %{
1.122 @@ -9585,6 +9572,18 @@
1.123 ins_pipe(ialu_reg_reg);
1.124 %}
1.125
1.126 +// Use any_RegP to match R15 (TLS register) without spilling.
1.127 +instruct orL_rReg_castP2X(rRegL dst, any_RegP src, rFlagsReg cr) %{
1.128 + match(Set dst (OrL dst (CastP2X src)));
1.129 + effect(KILL cr);
1.130 +
1.131 + format %{ "orq $dst, $src\t# long" %}
1.132 + opcode(0x0B);
1.133 + ins_encode(REX_reg_reg_wide(dst, src), OpcP, reg_reg(dst, src));
1.134 + ins_pipe(ialu_reg_reg);
1.135 +%}
1.136 +
1.137 +
1.138 // Or Register with Immediate
1.139 instruct orL_rReg_imm(rRegL dst, immL32 src, rFlagsReg cr)
1.140 %{
