1.1 --- a/src/cpu/x86/vm/x86_32.ad Thu Jul 03 11:01:32 2008 -0700 1.2 +++ b/src/cpu/x86/vm/x86_32.ad Fri Jul 11 01:14:44 2008 -0700 1.3 @@ -4754,6 +4754,33 @@ 1.4 interface(CONST_INTER); 1.5 %} 1.6 1.7 +operand immI_1() %{ 1.8 + predicate( n->get_int() == 1 ); 1.9 + match(ConI); 1.10 + 1.11 + op_cost(0); 1.12 + format %{ %} 1.13 + interface(CONST_INTER); 1.14 +%} 1.15 + 1.16 +operand immI_2() %{ 1.17 + predicate( n->get_int() == 2 ); 1.18 + match(ConI); 1.19 + 1.20 + op_cost(0); 1.21 + format %{ %} 1.22 + interface(CONST_INTER); 1.23 +%} 1.24 + 1.25 +operand immI_3() %{ 1.26 + predicate( n->get_int() == 3 ); 1.27 + match(ConI); 1.28 + 1.29 + op_cost(0); 1.30 + format %{ %} 1.31 + interface(CONST_INTER); 1.32 +%} 1.33 + 1.34 // Pointer Immediate 1.35 operand immP() %{ 1.36 match(ConP); 1.37 @@ -8943,6 +8970,63 @@ 1.38 ins_pipe( ialu_reg_long_mem ); 1.39 %} 1.40 1.41 +// Shift Left Long by 1 1.42 +instruct shlL_eReg_1(eRegL dst, immI_1 cnt, eFlagsReg cr) %{ 1.43 + predicate(UseNewLongLShift); 1.44 + match(Set dst (LShiftL dst cnt)); 1.45 + effect(KILL cr); 1.46 + ins_cost(100); 1.47 + format %{ "ADD $dst.lo,$dst.lo\n\t" 1.48 + "ADC $dst.hi,$dst.hi" %} 1.49 + ins_encode %{ 1.50 + __ addl($dst$$Register,$dst$$Register); 1.51 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.52 + %} 1.53 + ins_pipe( ialu_reg_long ); 1.54 +%} 1.55 + 1.56 +// Shift Left Long by 2 1.57 +instruct shlL_eReg_2(eRegL dst, immI_2 cnt, eFlagsReg cr) %{ 1.58 + predicate(UseNewLongLShift); 1.59 + match(Set dst (LShiftL dst cnt)); 1.60 + effect(KILL cr); 1.61 + ins_cost(100); 1.62 + format %{ "ADD $dst.lo,$dst.lo\n\t" 1.63 + "ADC $dst.hi,$dst.hi\n\t" 1.64 + "ADD $dst.lo,$dst.lo\n\t" 1.65 + "ADC $dst.hi,$dst.hi" %} 1.66 + ins_encode %{ 1.67 + __ addl($dst$$Register,$dst$$Register); 1.68 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.69 + __ addl($dst$$Register,$dst$$Register); 1.70 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.71 + %} 1.72 + ins_pipe( ialu_reg_long ); 1.73 +%} 1.74 + 1.75 +// Shift Left Long by 3 1.76 +instruct shlL_eReg_3(eRegL dst, immI_3 cnt, eFlagsReg cr) %{ 1.77 + predicate(UseNewLongLShift); 1.78 + match(Set dst (LShiftL dst cnt)); 1.79 + effect(KILL cr); 1.80 + ins_cost(100); 1.81 + format %{ "ADD $dst.lo,$dst.lo\n\t" 1.82 + "ADC $dst.hi,$dst.hi\n\t" 1.83 + "ADD $dst.lo,$dst.lo\n\t" 1.84 + "ADC $dst.hi,$dst.hi\n\t" 1.85 + "ADD $dst.lo,$dst.lo\n\t" 1.86 + "ADC $dst.hi,$dst.hi" %} 1.87 + ins_encode %{ 1.88 + __ addl($dst$$Register,$dst$$Register); 1.89 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.90 + __ addl($dst$$Register,$dst$$Register); 1.91 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.92 + __ addl($dst$$Register,$dst$$Register); 1.93 + __ adcl(HIGH_FROM_LOW($dst$$Register),HIGH_FROM_LOW($dst$$Register)); 1.94 + %} 1.95 + ins_pipe( ialu_reg_long ); 1.96 +%} 1.97 + 1.98 // Shift Left Long by 1-31 1.99 instruct shlL_eReg_1_31(eRegL dst, immI_1_31 cnt, eFlagsReg cr) %{ 1.100 match(Set dst (LShiftL dst cnt));