1.1 --- a/src/cpu/x86/vm/assembler_x86.hpp Wed Apr 06 16:02:53 2011 -0700 1.2 +++ b/src/cpu/x86/vm/assembler_x86.hpp Fri Apr 08 14:19:50 2011 -0700 1.3 @@ -1445,6 +1445,7 @@ 1.4 class MacroAssembler: public Assembler { 1.5 friend class LIR_Assembler; 1.6 friend class Runtime1; // as_Address() 1.7 + 1.8 protected: 1.9 1.10 Address as_Address(AddressLiteral adr); 1.11 @@ -1666,21 +1667,22 @@ 1.12 void store_check(Register obj); // store check for obj - register is destroyed afterwards 1.13 void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed) 1.14 1.15 +#ifndef SERIALGC 1.16 + 1.17 void g1_write_barrier_pre(Register obj, 1.18 -#ifndef _LP64 1.19 + Register pre_val, 1.20 Register thread, 1.21 -#endif 1.22 Register tmp, 1.23 - Register tmp2, 1.24 - bool tosca_live); 1.25 + bool tosca_live, 1.26 + bool expand_call); 1.27 + 1.28 void g1_write_barrier_post(Register store_addr, 1.29 Register new_val, 1.30 -#ifndef _LP64 1.31 Register thread, 1.32 -#endif 1.33 Register tmp, 1.34 Register tmp2); 1.35 1.36 +#endif // SERIALGC 1.37 1.38 // split store_check(Register obj) to enhance instruction interleaving 1.39 void store_check_part_1(Register obj);