1.1 --- a/src/cpu/sparc/vm/vm_version_sparc.cpp Mon Jun 12 13:58:09 2017 -0400 1.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.cpp Fri Jun 30 23:45:31 2017 -0700 1.3 @@ -236,7 +236,7 @@ 1.4 assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); 1.5 1.6 char buf[512]; 1.7 - jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 1.8 + jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 1.9 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")), 1.10 (has_hardware_popc() ? ", popc" : ""), 1.11 (has_vis1() ? ", vis1" : ""), 1.12 @@ -249,6 +249,7 @@ 1.13 (has_sha256() ? ", sha256" : ""), 1.14 (has_sha512() ? ", sha512" : ""), 1.15 (is_ultra3() ? ", ultra3" : ""), 1.16 + (has_sparc5_instr() ? ", sparc5" : ""), 1.17 (is_sun4v() ? ", sun4v" : ""), 1.18 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")), 1.19 (is_sparc64() ? ", sparc64" : ""), 1.20 @@ -364,6 +365,7 @@ 1.21 1.22 #ifndef PRODUCT 1.23 if (PrintMiscellaneous && Verbose) { 1.24 + tty->print_cr("L1 data cache line size: %u", L1_data_cache_line_size()); 1.25 tty->print_cr("L2 data cache line size: %u", L2_data_cache_line_size()); 1.26 tty->print("Allocation"); 1.27 if (AllocatePrefetchStyle <= 0) { 1.28 @@ -447,9 +449,10 @@ 1.29 1.30 unsigned int VM_Version::calc_parallel_worker_threads() { 1.31 unsigned int result; 1.32 - if (is_M_series()) { 1.33 - // for now, use same gc thread calculation for M-series as for niagara-plus 1.34 - // in future, we may want to tweak parameters for nof_parallel_worker_thread 1.35 + if (is_M_series() || is_S_series()) { 1.36 + // for now, use same gc thread calculation for M-series and S-series as for 1.37 + // niagara-plus. In future, we may want to tweak parameters for 1.38 + // nof_parallel_worker_thread 1.39 result = nof_parallel_worker_threads(5, 16, 8); 1.40 } else if (is_niagara_plus()) { 1.41 result = nof_parallel_worker_threads(5, 16, 8); 1.42 @@ -458,3 +461,37 @@ 1.43 } 1.44 return result; 1.45 } 1.46 + 1.47 + 1.48 +int VM_Version::parse_features(const char* implementation) { 1.49 + int features = unknown_m; 1.50 + // Convert to UPPER case before compare. 1.51 + char* impl = os::strdup(implementation); 1.52 + 1.53 + for (int i = 0; impl[i] != 0; i++) 1.54 + impl[i] = (char)toupper((uint)impl[i]); 1.55 + 1.56 + if (strstr(impl, "SPARC64") != NULL) { 1.57 + features |= sparc64_family_m; 1.58 + } else if (strstr(impl, "SPARC-M") != NULL) { 1.59 + // M-series SPARC is based on T-series. 1.60 + features |= (M_family_m | T_family_m); 1.61 + } else if (strstr(impl, "SPARC-S") != NULL) { 1.62 + // S-series SPARC is based on T-series. 1.63 + features |= (S_family_m | T_family_m); 1.64 + } else if (strstr(impl, "SPARC-T") != NULL) { 1.65 + features |= T_family_m; 1.66 + if (strstr(impl, "SPARC-T1") != NULL) { 1.67 + features |= T1_model_m; 1.68 + } 1.69 + } else if (strstr(impl, "SUN4V-CPU") != NULL) { 1.70 + // Generic or migration class LDOM 1.71 + features |= T_family_m; 1.72 + } else { 1.73 +#ifndef PRODUCT 1.74 + warning("Failed to parse CPU implementation = '%s'", impl); 1.75 +#endif 1.76 + } 1.77 + os::free((void*)impl); 1.78 + return features; 1.79 +}