1.1 --- a/src/share/vm/opto/matcher.cpp Fri Jun 20 10:17:09 2008 -0700
1.2 +++ b/src/share/vm/opto/matcher.cpp Fri Jun 20 11:10:05 2008 -0700
1.3 @@ -82,6 +82,7 @@
1.4 idealreg2debugmask[Op_RegF] = NULL;
1.5 idealreg2debugmask[Op_RegD] = NULL;
1.6 idealreg2debugmask[Op_RegP] = NULL;
1.7 + debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node
1.8 }
1.9
1.10 //------------------------------warp_incoming_stk_arg------------------------
1.11 @@ -1153,7 +1154,10 @@
1.12
1.13 // StoreNodes require their Memory input to match any LoadNodes
1.14 Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ;
1.15 -
1.16 +#ifdef ASSERT
1.17 + Node* save_mem_node = _mem_node;
1.18 + _mem_node = n->is_Store() ? (Node*)n : NULL;
1.19 +#endif
1.20 // State object for root node of match tree
1.21 // Allocate it on _states_arena - stack allocation can cause stack overflow.
1.22 State *s = new (&_states_arena) State;
1.23 @@ -1205,6 +1209,7 @@
1.24 }
1.25 }
1.26
1.27 + debug_only( _mem_node = save_mem_node; )
1.28 return m;
1.29 }
1.30
1.31 @@ -1445,8 +1450,30 @@
1.32 }
1.33
1.34 // If a Memory was used, insert a Memory edge
1.35 - if( mem != (Node*)1 )
1.36 + if( mem != (Node*)1 ) {
1.37 mach->ins_req(MemNode::Memory,mem);
1.38 +#ifdef ASSERT
1.39 + // Verify adr type after matching memory operation
1.40 + const MachOper* oper = mach->memory_operand();
1.41 + if (oper != NULL && oper != (MachOper*)-1 &&
1.42 + mach->adr_type() != TypeRawPtr::BOTTOM) { // non-direct addressing mode
1.43 + // It has a unique memory operand. Find corresponding ideal mem node.
1.44 + Node* m = NULL;
1.45 + if (leaf->is_Mem()) {
1.46 + m = leaf;
1.47 + } else {
1.48 + m = _mem_node;
1.49 + assert(m != NULL && m->is_Mem(), "expecting memory node");
1.50 + }
1.51 + if (m->adr_type() != mach->adr_type()) {
1.52 + m->dump();
1.53 + tty->print_cr("mach:");
1.54 + mach->dump(1);
1.55 + }
1.56 + assert(m->adr_type() == mach->adr_type(), "matcher should not change adr type");
1.57 + }
1.58 +#endif
1.59 + }
1.60
1.61 // If the _leaf is an AddP, insert the base edge
1.62 if( leaf->is_AddP() )
1.63 @@ -1510,7 +1537,9 @@
1.64 assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand");
1.65 mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C );
1.66 Node *mem1 = (Node*)1;
1.67 + debug_only(Node *save_mem_node = _mem_node;)
1.68 mach->add_req( ReduceInst(s, newrule, mem1) );
1.69 + debug_only(_mem_node = save_mem_node;)
1.70 }
1.71 return;
1.72 }
1.73 @@ -1520,6 +1549,7 @@
1.74 if( s->_leaf->is_Load() ) {
1.75 Node *mem2 = s->_leaf->in(MemNode::Memory);
1.76 assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" );
1.77 + debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;)
1.78 mem = mem2;
1.79 }
1.80 if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) {
1.81 @@ -1563,7 +1593,9 @@
1.82 // --> ReduceInst( newrule )
1.83 mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C );
1.84 Node *mem1 = (Node*)1;
1.85 + debug_only(Node *save_mem_node = _mem_node;)
1.86 mach->add_req( ReduceInst( newstate, newrule, mem1 ) );
1.87 + debug_only(_mem_node = save_mem_node;)
1.88 }
1.89 }
1.90 assert( mach->_opnds[num_opnds-1], "" );
1.91 @@ -1594,6 +1626,7 @@
1.92 if( s->_leaf->is_Load() ) {
1.93 assert( mem == (Node*)1, "multiple Memories being matched at once?" );
1.94 mem = s->_leaf->in(MemNode::Memory);
1.95 + debug_only(_mem_node = s->_leaf;)
1.96 }
1.97 if( s->_leaf->in(0) && s->_leaf->req() > 1) {
1.98 if( !mach->in(0) )
1.99 @@ -1618,7 +1651,9 @@
1.100 // Reduce the instruction, and add a direct pointer from this
1.101 // machine instruction to the newly reduced one.
1.102 Node *mem1 = (Node*)1;
1.103 + debug_only(Node *save_mem_node = _mem_node;)
1.104 mach->add_req( ReduceInst( kid, newrule, mem1 ) );
1.105 + debug_only(_mem_node = save_mem_node;)
1.106 }
1.107 }
1.108 }
