1.1 --- a/src/share/vm/c1/c1_LIR.cpp Tue Sep 18 10:18:15 2018 +0800 1.2 +++ b/src/share/vm/c1/c1_LIR.cpp Tue Sep 18 11:27:54 2018 +0800 1.3 @@ -305,6 +305,18 @@ 1.4 if (dst_lo == src_lo) return true; 1.5 #endif 1.6 } 1.7 + } else if (is_double_fpu()) { 1.8 + if (opr->is_double_fpu()) { 1.9 + return as_double_reg() == opr->as_double_reg(); 1.10 + } else if (opr->is_single_fpu()) { 1.11 + return as_double_reg() == opr->as_float_reg(); 1.12 + } 1.13 + } else if (is_single_fpu()) { 1.14 + if (opr->is_single_fpu()) { 1.15 + return as_float_reg() == opr->as_float_reg(); 1.16 + } else if (opr->is_double_fpu()) { 1.17 + return as_float_reg() == opr->as_double_reg(); 1.18 + } 1.19 } 1.20 return false; 1.21 }