1.1 --- a/src/cpu/mips/vm/mips_64.ad Thu Feb 21 10:14:02 2019 +0800
1.2 +++ b/src/cpu/mips/vm/mips_64.ad Tue Mar 05 17:00:17 2019 +0800
1.3 @@ -1,6 +1,6 @@
1.4 //
1.5 // Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
1.6 -// Copyright (c) 2015, 2018, Loongson Technology. All rights reserved.
1.7 +// Copyright (c) 2015, 2019, Loongson Technology. All rights reserved.
1.8 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.9 //
1.10 // This code is free software; you can redistribute it and/or modify it
1.11 @@ -606,7 +606,7 @@
1.12 void emit_java_to_interp(CodeBuffer &cbuf ) {
1.13 // Stub is fixed up when the corresponding call is converted from calling
1.14 // compiled code to calling interpreted code.
1.15 - // mov rbx,0
1.16 + // mov S3,0
1.17 // jmp -1
1.18
1.19 address mark = cbuf.insts_mark(); // get mark within main instrs section
1.20 @@ -769,7 +769,7 @@
1.21 // Registers not mentioned will be killed by the VM call in the trampoline, and
1.22 // arguments in those registers not be available to the callee.
1.23 bool Matcher::can_be_java_arg( int reg ) {
1.24 - /* Refer to: [sharedRuntime_mips_64.cpp] SharedRuntime::java_calling_convention() */
1.25 + // Refer to: [sharedRuntime_mips_64.cpp] SharedRuntime::java_calling_convention()
1.26 if ( reg == T0_num || reg == T0_H_num
1.27 || reg == A0_num || reg == A0_H_num
1.28 || reg == A1_num || reg == A1_H_num
1.29 @@ -873,10 +873,9 @@
1.30 // Advertise here if the CPU requires explicit rounding operations
1.31 // to implement the UseStrictFP mode.
1.32 const bool Matcher::strict_fp_requires_explicit_rounding = false;
1.33 -// The ecx parameter to rep stos for the ClearArray node is in dwords.
1.34 +// false => size gets scaled to BytesPerLong, ok.
1.35 const bool Matcher::init_array_count_is_in_bytes = false;
1.36
1.37 -
1.38 // Indicate if the safepoint node needs the polling page as an input.
1.39 // Since MIPS doesn't have absolute addressing, it needs.
1.40 bool SafePointNode::needs_polling_address_input() {
1.41 @@ -1526,8 +1525,8 @@
1.42 __ relocate(relocInfo::runtime_call_type);
1.43 __ patchable_jump((address)SharedRuntime::get_ic_miss_stub());
1.44
1.45 - /* WARNING these NOPs are critical so that verified entry point is properly
1.46 - * 8 bytes aligned for patching by NativeJump::patch_verified_entry() */
1.47 + // WARNING these NOPs are critical so that verified entry point is properly
1.48 + // 8 bytes aligned for patching by NativeJump::patch_verified_entry()
1.49 __ align(CodeEntryAlignment);
1.50 __ bind(L);
1.51 }
1.52 @@ -3392,9 +3391,9 @@
1.53 %}
1.54
1.55
1.56 - /*
1.57 - * [Ref: LIR_Assembler::ic_call() ]
1.58 - */
1.59 + //
1.60 + // [Ref: LIR_Assembler::ic_call() ]
1.61 + //
1.62 enc_class Java_Dynamic_Call (method meth) %{ // JAVA DYNAMIC CALL
1.63 MacroAssembler _masm(&cbuf);
1.64 __ block_comment("Java_Dynamic_Call");
1.65 @@ -3535,10 +3534,7 @@
1.66
1.67 // Number of stack slots between incoming argument block and the start of
1.68 // a new frame. The PROLOG must add this many slots to the stack. The
1.69 - // EPILOG must remove this many slots. Intel needs one slot for
1.70 - // return address.
1.71 - // generate Matcher::in_preserve_stack_slots
1.72 - //in_preserve_stack_slots(VerifyStackAtCalls + 2); //Now VerifyStackAtCalls is defined as false ! Leave one stack slot for ra and fp
1.73 + // EPILOG must remove this many slots.
1.74 in_preserve_stack_slots(4); //Now VerifyStackAtCalls is defined as false ! Leave two stack slots for ra and fp
1.75
1.76 // Number of outgoing stack slots killed above the out_preserve_stack_slots
1.77 @@ -14166,7 +14162,7 @@
1.78 %}
1.79
1.80 // Conditional-store of an int value.
1.81 -// ZF flag is set on success, reset otherwise. Implemented with a CMPXCHG on Intel.
1.82 +// AT flag is set on success, reset otherwise.
1.83 instruct storeIConditional( memory mem, mRegI oldval, mRegI newval, FlagsReg cr ) %{
1.84 match(Set cr (StoreIConditional mem (Binary oldval newval)));
1.85 // effect(KILL oldval);
