src/share/vm/c1/c1_LIRGenerator.hpp

changeset 6876
710a3c8b516e
parent 6103
e6ba215af802
parent 1
2d8a650513c2
child 7535
7ae4e26cb1e0
     1.1 --- a/src/share/vm/c1/c1_LIRGenerator.hpp	Mon Sep 08 12:35:01 2014 -0700
     1.2 +++ b/src/share/vm/c1/c1_LIRGenerator.hpp	Tue Aug 08 15:57:29 2017 +0800
     1.3 @@ -22,6 +22,12 @@
     1.4   *
     1.5   */
     1.6  
     1.7 +/*
     1.8 + * This file has been modified by Loongson Technology in 2015. These
     1.9 + * modifications are Copyright (c) 2015 Loongson Technology, and are made
    1.10 + * available on the same license terms set forth above.
    1.11 + */
    1.12 +
    1.13  #ifndef SHARE_VM_C1_C1_LIRGENERATOR_HPP
    1.14  #define SHARE_VM_C1_C1_LIRGENERATOR_HPP
    1.15  
    1.16 @@ -184,6 +190,9 @@
    1.17    LIR_OprList                     _reg_for_constants;
    1.18    Values                          _unpinned_constants;
    1.19  
    1.20 +#ifdef MIPS64
    1.21 +  LIR_Const*                      _card_table_base;
    1.22 +#endif
    1.23    friend class PhiResolver;
    1.24  
    1.25    // unified bailout support
    1.26 @@ -204,6 +213,11 @@
    1.27    LIR_Opr load_constant(Constant* x);
    1.28    LIR_Opr load_constant(LIR_Const* constant);
    1.29  
    1.30 +#ifdef MIPS64
    1.31 +  LIR_Const* card_table_base() const {
    1.32 +     return _card_table_base;
    1.33 +  }
    1.34 +#endif
    1.35    // Given an immediate value, return an operand usable in logical ops.
    1.36    LIR_Opr load_immediate(int x, BasicType type);
    1.37  
    1.38 @@ -224,6 +238,9 @@
    1.39    LIR_Opr round_item(LIR_Opr opr);
    1.40    LIR_Opr force_to_spill(LIR_Opr value, BasicType t);
    1.41  
    1.42 +#ifdef MIPS64
    1.43 +  void profile_branch(If* if_instr, If::Condition cond, LIR_Opr left, LIR_Opr right);
    1.44 +#endif
    1.45    PhiResolverState& resolver_state() { return _resolver_state; }
    1.46  
    1.47    void  move_to_phi(PhiResolver* resolver, Value cur_val, Value sux_val);
    1.48 @@ -324,9 +341,11 @@
    1.49  
    1.50    void monitor_enter (LIR_Opr object, LIR_Opr lock, LIR_Opr hdr, LIR_Opr scratch, int monitor_no, CodeEmitInfo* info_for_exception, CodeEmitInfo* info);
    1.51    void monitor_exit  (LIR_Opr object, LIR_Opr lock, LIR_Opr hdr, LIR_Opr scratch, int monitor_no);
    1.52 -
    1.53 +#ifndef MIPS64
    1.54    void new_instance    (LIR_Opr  dst, ciInstanceKlass* klass, LIR_Opr  scratch1, LIR_Opr  scratch2, LIR_Opr  scratch3,  LIR_Opr scratch4, LIR_Opr  klass_reg, CodeEmitInfo* info);
    1.55 -
    1.56 +#else
    1.57 +  void new_instance    (LIR_Opr  dst, ciInstanceKlass* klass, LIR_Opr  scratch1, LIR_Opr  scratch2, LIR_Opr  scratch3,  LIR_Opr scratch4, LIR_Opr  scratch5, LIR_Opr scratch6, LIR_Opr klass_reg, CodeEmitInfo* info);
    1.58 +#endif
    1.59    // machine dependent
    1.60    void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
    1.61    void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info);
    1.62 @@ -347,6 +366,9 @@
    1.63    }
    1.64    LIR_Address* emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, BasicType type, bool needs_card_mark);
    1.65  
    1.66 +#ifdef MIPS64
    1.67 +  void write_barrier(LIR_Opr addr);
    1.68 +#endif
    1.69    // the helper for generate_address
    1.70    void add_large_constant(LIR_Opr src, int c, LIR_Opr dest);
    1.71  

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