1.1 --- a/src/cpu/sparc/vm/vm_version_sparc.hpp Tue Mar 10 08:52:16 2009 -0700
1.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.hpp Wed Mar 11 14:16:13 2009 -0700
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
1.6 + * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 *
1.9 * This code is free software; you can redistribute it and/or modify it
1.10 @@ -25,34 +25,36 @@
1.11 class VM_Version: public Abstract_VM_Version {
1.12 protected:
1.13 enum Feature_Flag {
1.14 - v8_instructions = 0,
1.15 - hardware_int_muldiv = 1,
1.16 - hardware_fsmuld = 2,
1.17 - v9_instructions = 3,
1.18 - vis1_instructions = 4,
1.19 - vis2_instructions = 5,
1.20 - sun4v_instructions = 6
1.21 + v8_instructions = 0,
1.22 + hardware_mul32 = 1,
1.23 + hardware_div32 = 2,
1.24 + hardware_fsmuld = 3,
1.25 + v9_instructions = 4,
1.26 + vis1_instructions = 5,
1.27 + vis2_instructions = 6,
1.28 + sun4v_instructions = 7
1.29 };
1.30
1.31 enum Feature_Flag_Set {
1.32 - unknown_m = 0,
1.33 - all_features_m = -1,
1.34 + unknown_m = 0,
1.35 + all_features_m = -1,
1.36
1.37 - v8_instructions_m = 1 << v8_instructions,
1.38 - hardware_int_muldiv_m = 1 << hardware_int_muldiv,
1.39 - hardware_fsmuld_m = 1 << hardware_fsmuld,
1.40 - v9_instructions_m = 1 << v9_instructions,
1.41 - vis1_instructions_m = 1 << vis1_instructions,
1.42 - vis2_instructions_m = 1 << vis2_instructions,
1.43 - sun4v_m = 1 << sun4v_instructions,
1.44 + v8_instructions_m = 1 << v8_instructions,
1.45 + hardware_mul32_m = 1 << hardware_mul32,
1.46 + hardware_div32_m = 1 << hardware_div32,
1.47 + hardware_fsmuld_m = 1 << hardware_fsmuld,
1.48 + v9_instructions_m = 1 << v9_instructions,
1.49 + vis1_instructions_m = 1 << vis1_instructions,
1.50 + vis2_instructions_m = 1 << vis2_instructions,
1.51 + sun4v_m = 1 << sun4v_instructions,
1.52
1.53 - generic_v8_m = v8_instructions_m | hardware_int_muldiv_m | hardware_fsmuld_m,
1.54 - generic_v9_m = generic_v8_m | v9_instructions_m | vis1_instructions_m,
1.55 - ultra3_m = generic_v9_m | vis2_instructions_m,
1.56 + generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m,
1.57 + generic_v9_m = generic_v8_m | v9_instructions_m,
1.58 + ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m,
1.59
1.60 // Temporary until we have something more accurate
1.61 - niagara1_unique_m = sun4v_m,
1.62 - niagara1_m = generic_v9_m | niagara1_unique_m
1.63 + niagara1_unique_m = sun4v_m,
1.64 + niagara1_m = generic_v9_m | niagara1_unique_m
1.65 };
1.66
1.67 static int _features;
1.68 @@ -62,7 +64,7 @@
1.69 static int determine_features();
1.70 static int platform_features(int features);
1.71
1.72 - static bool is_niagara1(int features) { return (features & niagara1_m) == niagara1_m; }
1.73 + static bool is_niagara1(int features) { return (features & sun4v_m) != 0; }
1.74
1.75 static int maximum_niagara1_processor_count() { return 32; }
1.76 // Returns true if the platform is in the niagara line and
1.77 @@ -76,7 +78,8 @@
1.78 // Instruction support
1.79 static bool has_v8() { return (_features & v8_instructions_m) != 0; }
1.80 static bool has_v9() { return (_features & v9_instructions_m) != 0; }
1.81 - static bool has_hardware_int_muldiv() { return (_features & hardware_int_muldiv_m) != 0; }
1.82 + static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; }
1.83 + static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; }
1.84 static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; }
1.85 static bool has_vis1() { return (_features & vis1_instructions_m) != 0; }
1.86 static bool has_vis2() { return (_features & vis2_instructions_m) != 0; }
