1.1 --- a/src/cpu/ppc/vm/sharedRuntime_ppc.cpp Tue Dec 10 14:29:43 2013 +0100
1.2 +++ b/src/cpu/ppc/vm/sharedRuntime_ppc.cpp Wed Dec 11 00:06:11 2013 +0100
1.3 @@ -687,17 +687,9 @@
1.4 F13->as_VMReg()
1.5 };
1.6
1.7 - const int num_iarg_registers = sizeof(iarg_reg) / sizeof(iarg_reg[0]);
1.8 - const int num_farg_registers = sizeof(farg_reg) / sizeof(farg_reg[0]);
1.9 -
1.10 - // The first 8 arguments are not passed on the stack.
1.11 - const int num_args_in_regs = 8;
1.12 -#define put_arg_in_reg(arg) ((arg) < num_args_in_regs)
1.13 -
1.14 // Check calling conventions consistency.
1.15 - assert(num_iarg_registers == num_args_in_regs
1.16 - && num_iarg_registers == 8
1.17 - && num_farg_registers == 13,
1.18 + assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
1.19 + sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
1.20 "consistency");
1.21
1.22 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
1.23 @@ -705,8 +697,6 @@
1.24 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
1.25 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
1.26
1.27 - int ill_i = 0;
1.28 - int ill_t = 0;
1.29 int i;
1.30 VMReg reg;
1.31 // Leave room for C-compatible ABI_112.
1.32 @@ -726,6 +716,11 @@
1.33 if (regs2 != NULL) regs2[i].set_bad();
1.34
1.35 switch(sig_bt[i]) {
1.36 +
1.37 + //
1.38 + // If arguments 0-7 are integers, they are passed in integer registers.
1.39 + // Argument i is placed in iarg_reg[i].
1.40 + //
1.41 case T_BOOLEAN:
1.42 case T_CHAR:
1.43 case T_BYTE:
1.44 @@ -754,7 +749,7 @@
1.45 case T_ADDRESS:
1.46 case T_METADATA:
1.47 // Oops are already boxed if required (JNI).
1.48 - if (put_arg_in_reg(arg)) {
1.49 + if (arg < Argument::n_int_register_parameters_c) {
1.50 reg = iarg_reg[arg];
1.51 } else {
1.52 reg = VMRegImpl::stack2reg(stk);
1.53 @@ -762,57 +757,66 @@
1.54 }
1.55 regs[i].set2(reg);
1.56 break;
1.57 +
1.58 + //
1.59 + // Floats are treated differently from int regs: The first 13 float arguments
1.60 + // are passed in registers (not the float args among the first 13 args).
1.61 + // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
1.62 + // in farg_reg[j] if argument i is the j-th float argument of this call.
1.63 + //
1.64 case T_FLOAT:
1.65 - if (put_arg_in_reg(arg)) {
1.66 + if (freg < Argument::n_float_register_parameters_c) {
1.67 + // Put float in register ...
1.68 reg = farg_reg[freg];
1.69 + ++freg;
1.70 +
1.71 + // Argument i for i > 8 is placed on the stack even if it's
1.72 + // placed in a register (if it's a float arg). Aix disassembly
1.73 + // shows that xlC places these float args on the stack AND in
1.74 + // a register. This is not documented, but we follow this
1.75 + // convention, too.
1.76 + if (arg >= Argument::n_regs_not_on_stack_c) {
1.77 + // ... and on the stack.
1.78 + guarantee(regs2 != NULL, "must pass float in register and stack slot");
1.79 + VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
1.80 + regs2[i].set1(reg2);
1.81 + stk += inc_stk_for_intfloat;
1.82 + }
1.83 +
1.84 } else {
1.85 - // Put float on stack
1.86 -# if defined(LINUX)
1.87 - reg = VMRegImpl::stack2reg(stk+1);
1.88 -# elif defined(AIX)
1.89 - reg = VMRegImpl::stack2reg(stk);
1.90 -# else
1.91 -# error "unknown OS"
1.92 -# endif
1.93 + // Put float on stack.
1.94 + reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
1.95 stk += inc_stk_for_intfloat;
1.96 }
1.97 -
1.98 - if (freg < num_farg_registers) {
1.99 - // There are still some float argument registers left. Put the
1.100 - // float in a register if not already done.
1.101 - if (reg != farg_reg[freg]) {
1.102 - guarantee(regs2 != NULL, "must pass float in register and stack slot");
1.103 - VMReg reg2 = farg_reg[freg];
1.104 - regs2[i].set1(reg2);
1.105 - }
1.106 - ++freg;
1.107 - }
1.108 -
1.109 regs[i].set1(reg);
1.110 break;
1.111 case T_DOUBLE:
1.112 assert(sig_bt[i+1] == T_VOID, "expecting half");
1.113 - if (put_arg_in_reg(arg)) {
1.114 + if (freg < Argument::n_float_register_parameters_c) {
1.115 + // Put double in register ...
1.116 reg = farg_reg[freg];
1.117 + ++freg;
1.118 +
1.119 + // Argument i for i > 8 is placed on the stack even if it's
1.120 + // placed in a register (if it's a double arg). Aix disassembly
1.121 + // shows that xlC places these float args on the stack AND in
1.122 + // a register. This is not documented, but we follow this
1.123 + // convention, too.
1.124 + if (arg >= Argument::n_regs_not_on_stack_c) {
1.125 + // ... and on the stack.
1.126 + guarantee(regs2 != NULL, "must pass float in register and stack slot");
1.127 + VMReg reg2 = VMRegImpl::stack2reg(stk);
1.128 + regs2[i].set2(reg2);
1.129 + stk += inc_stk_for_longdouble;
1.130 + }
1.131 } else {
1.132 // Put double on stack.
1.133 reg = VMRegImpl::stack2reg(stk);
1.134 stk += inc_stk_for_longdouble;
1.135 }
1.136 -
1.137 - if (freg < num_farg_registers) {
1.138 - // There are still some float argument registers left. Put the
1.139 - // float in a register if not already done.
1.140 - if (reg != farg_reg[freg]) {
1.141 - guarantee(regs2 != NULL, "must pass float in register and stack slot");
1.142 - VMReg reg2 = farg_reg[freg];
1.143 - regs2[i].set2(reg2);
1.144 - }
1.145 - ++freg;
1.146 - }
1.147 -
1.148 regs[i].set2(reg);
1.149 break;
1.150 +
1.151 case T_VOID:
1.152 // Do not count halves.
1.153 regs[i].set_bad();
1.154 @@ -877,7 +881,7 @@
1.155 __ mtlr(return_pc);
1.156
1.157
1.158 - // call the interpreter
1.159 + // Call the interpreter.
1.160 __ BIND(call_interpreter);
1.161 __ mtctr(ientry);
1.162
1.163 @@ -947,8 +951,12 @@
1.164
1.165 // Jump to the interpreter just as if interpreter was doing it.
1.166
1.167 +#ifdef CC_INTERP
1.168 + const Register tos = R17_tos;
1.169 +#endif
1.170 +
1.171 // load TOS
1.172 - __ addi(R17_tos, R1_SP, st_off);
1.173 + __ addi(tos, R1_SP, st_off);
1.174
1.175 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
1.176 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
1.177 @@ -982,7 +990,9 @@
1.178 // save code can segv when fxsave instructions find improperly
1.179 // aligned stack pointer.
1.180
1.181 +#ifdef CC_INTERP
1.182 const Register ld_ptr = R17_tos;
1.183 +#endif
1.184 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
1.185 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
1.186 int value_regs_index = 0;
1.187 @@ -1137,7 +1147,7 @@
1.188 __ bne_predict_taken(CCR0, valid);
1.189 // We have a null argument, branch to ic_miss_stub.
1.190 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1.191 - relocInfo::runtime_call_type);
1.192 + relocInfo::runtime_call_type);
1.193 __ BIND(valid);
1.194 }
1.195 }
1.196 @@ -1154,7 +1164,7 @@
1.197 __ beq_predict_taken(CCR0, valid);
1.198 // We have an unexpected klass, branch to ic_miss_stub.
1.199 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1.200 - relocInfo::runtime_call_type);
1.201 + relocInfo::runtime_call_type);
1.202 __ BIND(valid);
1.203 }
1.204
1.205 @@ -1170,8 +1180,7 @@
1.206 __ beq_predict_taken(CCR0, call_interpreter);
1.207
1.208 // Branch to ic_miss_stub.
1.209 - __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1.210 - relocInfo::runtime_call_type);
1.211 + __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1.212
1.213 // entry: c2i
1.214
1.215 @@ -2594,7 +2603,11 @@
1.216 __ ld(frame_size_reg, 0, frame_sizes_reg);
1.217 __ std(pc_reg, _abi(lr), R1_SP);
1.218 __ push_frame(frame_size_reg, R0/*tmp*/);
1.219 +#ifdef CC_INTERP
1.220 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
1.221 +#else
1.222 + Unimplemented();
1.223 +#endif
1.224 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
1.225 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
1.226 __ addi(pcs_reg, pcs_reg, wordSize);
1.227 @@ -2693,7 +2706,9 @@
1.228 // Store it in the top interpreter frame.
1.229 __ std(R0, _abi(lr), R1_SP);
1.230 // Initialize frame_manager_lr of interpreter top frame.
1.231 +#ifdef CC_INTERP
1.232 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
1.233 +#endif
1.234 }
1.235 #endif
1.236
1.237 @@ -2886,8 +2901,7 @@
1.238
1.239 // Initialize R14_state.
1.240 __ ld(R14_state, 0, R1_SP);
1.241 - __ addi(R14_state, R14_state,
1.242 - -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
1.243 + __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
1.244 // Also inititialize R15_prev_state.
1.245 __ restore_prev_state();
1.246
1.247 @@ -3010,8 +3024,7 @@
1.248
1.249 // Initialize R14_state, ...
1.250 __ ld(R11_scratch1, 0, R1_SP);
1.251 - __ addi(R14_state, R11_scratch1,
1.252 - -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
1.253 + __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
1.254 // also initialize R15_prev_state.
1.255 __ restore_prev_state();
1.256 // Return to the interpreter entry point.
