1.1 --- a/src/cpu/x86/vm/c1_LinearScan_x86.cpp Mon May 14 09:36:00 2012 -0700
1.2 +++ b/src/cpu/x86/vm/c1_LinearScan_x86.cpp Tue May 15 10:10:23 2012 +0200
1.3 @@ -690,8 +690,8 @@
1.4
1.5 case lir_mul_strictfp:
1.6 case lir_div_strictfp: {
1.7 - assert(op2->tmp_opr()->is_fpu_register(), "strict operations need temporary fpu stack slot");
1.8 - insert_free_if_dead(op2->tmp_opr());
1.9 + assert(op2->tmp1_opr()->is_fpu_register(), "strict operations need temporary fpu stack slot");
1.10 + insert_free_if_dead(op2->tmp1_opr());
1.11 assert(sim()->stack_size() <= 7, "at least one stack slot must be free");
1.12 // fall-through: continue with the normal handling of lir_mul and lir_div
1.13 }
1.14 @@ -787,16 +787,17 @@
1.15
1.16 case lir_log:
1.17 case lir_log10: {
1.18 - // log and log10 needs one temporary fpu stack slot, so there is ontemporary
1.19 - // registers stored in temp of the operation.
1.20 - // the stack allocator must guarantee that the stack slots are really free,
1.21 - // otherwise there might be a stack overflow.
1.22 + // log and log10 need one temporary fpu stack slot, so
1.23 + // there is one temporary registers stored in temp of the
1.24 + // operation. the stack allocator must guarantee that the stack
1.25 + // slots are really free, otherwise there might be a stack
1.26 + // overflow.
1.27 assert(right->is_illegal(), "must be");
1.28 assert(left->is_fpu_register(), "must be");
1.29 assert(res->is_fpu_register(), "must be");
1.30 - assert(op2->tmp_opr()->is_fpu_register(), "must be");
1.31 + assert(op2->tmp1_opr()->is_fpu_register(), "must be");
1.32
1.33 - insert_free_if_dead(op2->tmp_opr());
1.34 + insert_free_if_dead(op2->tmp1_opr());
1.35 insert_free_if_dead(res, left);
1.36 insert_exchange(left);
1.37 do_rename(left, res);
1.38 @@ -812,8 +813,9 @@
1.39
1.40 case lir_tan:
1.41 case lir_sin:
1.42 - case lir_cos: {
1.43 - // sin and cos need two temporary fpu stack slots, so there are two temporary
1.44 + case lir_cos:
1.45 + case lir_exp: {
1.46 + // sin, cos and exp need two temporary fpu stack slots, so there are two temporary
1.47 // registers (stored in right and temp of the operation).
1.48 // the stack allocator must guarantee that the stack slots are really free,
1.49 // otherwise there might be a stack overflow.
1.50 @@ -821,11 +823,11 @@
1.51 assert(res->is_fpu_register(), "must be");
1.52 // assert(left->is_last_use(), "old value gets destroyed");
1.53 assert(right->is_fpu_register(), "right is used as the first temporary register");
1.54 - assert(op2->tmp_opr()->is_fpu_register(), "temp is used as the second temporary register");
1.55 - assert(fpu_num(left) != fpu_num(right) && fpu_num(right) != fpu_num(op2->tmp_opr()) && fpu_num(op2->tmp_opr()) != fpu_num(res), "need distinct temp registers");
1.56 + assert(op2->tmp1_opr()->is_fpu_register(), "temp is used as the second temporary register");
1.57 + assert(fpu_num(left) != fpu_num(right) && fpu_num(right) != fpu_num(op2->tmp1_opr()) && fpu_num(op2->tmp1_opr()) != fpu_num(res), "need distinct temp registers");
1.58
1.59 insert_free_if_dead(right);
1.60 - insert_free_if_dead(op2->tmp_opr());
1.61 + insert_free_if_dead(op2->tmp1_opr());
1.62
1.63 insert_free_if_dead(res, left);
1.64 insert_exchange(left);
1.65 @@ -839,6 +841,53 @@
1.66 break;
1.67 }
1.68
1.69 + case lir_pow: {
1.70 + // pow needs two temporary fpu stack slots, so there are two temporary
1.71 + // registers (stored in tmp1 and tmp2 of the operation).
1.72 + // the stack allocator must guarantee that the stack slots are really free,
1.73 + // otherwise there might be a stack overflow.
1.74 + assert(left->is_fpu_register(), "must be");
1.75 + assert(right->is_fpu_register(), "must be");
1.76 + assert(res->is_fpu_register(), "must be");
1.77 +
1.78 + assert(op2->tmp1_opr()->is_fpu_register(), "tmp1 is the first temporary register");
1.79 + assert(op2->tmp2_opr()->is_fpu_register(), "tmp2 is the second temporary register");
1.80 + assert(fpu_num(left) != fpu_num(right) && fpu_num(left) != fpu_num(op2->tmp1_opr()) && fpu_num(left) != fpu_num(op2->tmp2_opr()) && fpu_num(left) != fpu_num(res), "need distinct temp registers");
1.81 + assert(fpu_num(right) != fpu_num(op2->tmp1_opr()) && fpu_num(right) != fpu_num(op2->tmp2_opr()) && fpu_num(right) != fpu_num(res), "need distinct temp registers");
1.82 + assert(fpu_num(op2->tmp1_opr()) != fpu_num(op2->tmp2_opr()) && fpu_num(op2->tmp1_opr()) != fpu_num(res), "need distinct temp registers");
1.83 + assert(fpu_num(op2->tmp2_opr()) != fpu_num(res), "need distinct temp registers");
1.84 +
1.85 + insert_free_if_dead(op2->tmp1_opr());
1.86 + insert_free_if_dead(op2->tmp2_opr());
1.87 +
1.88 + // Must bring both operands to top of stack with following operand ordering:
1.89 + // * fpu stack before pow: ... right left
1.90 + // * fpu stack after pow: ... left
1.91 +
1.92 + insert_free_if_dead(res, right);
1.93 +
1.94 + if (tos_offset(right) != 1) {
1.95 + insert_exchange(right);
1.96 + insert_exchange(1);
1.97 + }
1.98 + insert_exchange(left);
1.99 + assert(tos_offset(right) == 1, "check");
1.100 + assert(tos_offset(left) == 0, "check");
1.101 +
1.102 + new_left = to_fpu_stack_top(left);
1.103 + new_right = to_fpu_stack(right);
1.104 +
1.105 + op2->set_fpu_stack_size(sim()->stack_size());
1.106 + assert(sim()->stack_size() <= 6, "at least two stack slots must be free");
1.107 +
1.108 + sim()->pop();
1.109 +
1.110 + do_rename(right, res);
1.111 +
1.112 + new_res = to_fpu_stack_top(res);
1.113 + break;
1.114 + }
1.115 +
1.116 default: {
1.117 assert(false, "missed a fpu-operation");
1.118 }
