src/share/vm/c1/c1_LIRAssembler.cpp

changeset 1919
61b2245abf36
parent 1813
9f5b60a14736
child 1934
e9ff18c4ace7
     1.1 --- a/src/share/vm/c1/c1_LIRAssembler.cpp	Thu May 20 06:34:23 2010 -0700
     1.2 +++ b/src/share/vm/c1/c1_LIRAssembler.cpp	Fri May 21 02:59:24 2010 -0700
     1.3 @@ -301,9 +301,9 @@
     1.4  }
     1.5  
     1.6  
     1.7 -void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool is_method_handle_invoke) {
     1.8 +void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
     1.9    flush_debug_info(pc_offset);
    1.10 -  cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset, is_method_handle_invoke);
    1.11 +  cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
    1.12    if (cinfo->exception_handlers() != NULL) {
    1.13      compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
    1.14    }
    1.15 @@ -413,12 +413,6 @@
    1.16  void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
    1.17    verify_oop_map(op->info());
    1.18  
    1.19 -  // JSR 292
    1.20 -  // Preserve the SP over MethodHandle call sites.
    1.21 -  if (op->is_method_handle_invoke()) {
    1.22 -    preserve_SP(op);
    1.23 -  }
    1.24 -
    1.25    if (os::is_MP()) {
    1.26      // must align calls sites, otherwise they can't be updated atomically on MP hardware
    1.27      align_call(op->code());
    1.28 @@ -444,10 +438,6 @@
    1.29    default: ShouldNotReachHere();
    1.30    }
    1.31  
    1.32 -  if (op->is_method_handle_invoke()) {
    1.33 -    restore_SP(op);
    1.34 -  }
    1.35 -
    1.36  #if defined(X86) && defined(TIERED)
    1.37    // C2 leave fpu stack dirty clean it
    1.38    if (UseSSE < 2) {

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