src/cpu/x86/vm/assembler_x86.hpp

changeset 1057
56aae7be60d4
parent 855
a1980da045cc
child 1058
9adddb8c0fc8
     1.1 --- a/src/cpu/x86/vm/assembler_x86.hpp	Tue Mar 03 18:25:57 2009 -0800
     1.2 +++ b/src/cpu/x86/vm/assembler_x86.hpp	Wed Mar 04 09:58:39 2009 -0800
     1.3 @@ -153,6 +153,21 @@
     1.4      times_8  =  3,
     1.5      times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
     1.6    };
     1.7 +  static ScaleFactor times(int size) {
     1.8 +    assert(size >= 1 && size <= 8 && is_power_of_2(size), "bad scale size");
     1.9 +    if (size == 8)  return times_8;
    1.10 +    if (size == 4)  return times_4;
    1.11 +    if (size == 2)  return times_2;
    1.12 +    return times_1;
    1.13 +  }
    1.14 +  static int scale_size(ScaleFactor scale) {
    1.15 +    assert(scale != no_scale, "");
    1.16 +    assert(((1 << (int)times_1) == 1 &&
    1.17 +            (1 << (int)times_2) == 2 &&
    1.18 +            (1 << (int)times_4) == 4 &&
    1.19 +            (1 << (int)times_8) == 8), "");
    1.20 +    return (1 << (int)scale);
    1.21 +  }
    1.22  
    1.23   private:
    1.24    Register         _base;
    1.25 @@ -197,6 +212,22 @@
    1.26             "inconsistent address");
    1.27    }
    1.28  
    1.29 +  Address(Register base, RegisterConstant index, ScaleFactor scale = times_1, int disp = 0)
    1.30 +    : _base (base),
    1.31 +      _index(index.register_or_noreg()),
    1.32 +      _scale(scale),
    1.33 +      _disp (disp + (index.constant_or_zero() * scale_size(scale))) {
    1.34 +    if (!index.is_register())  scale = Address::no_scale;
    1.35 +    assert(!_index->is_valid() == (scale == Address::no_scale),
    1.36 +           "inconsistent address");
    1.37 +  }
    1.38 +
    1.39 +  Address plus_disp(int disp) const {
    1.40 +    Address a = (*this);
    1.41 +    a._disp += disp;
    1.42 +    return a;
    1.43 +  }
    1.44 +
    1.45    // The following two overloads are used in connection with the
    1.46    // ByteSize type (see sizes.hpp).  They simplify the use of
    1.47    // ByteSize'd arguments in assembly code. Note that their equivalent
    1.48 @@ -224,6 +255,17 @@
    1.49      assert(!index->is_valid() == (scale == Address::no_scale),
    1.50             "inconsistent address");
    1.51    }
    1.52 +
    1.53 +  Address(Register base, RegisterConstant index, ScaleFactor scale, ByteSize disp)
    1.54 +    : _base (base),
    1.55 +      _index(index.register_or_noreg()),
    1.56 +      _scale(scale),
    1.57 +      _disp (in_bytes(disp) + (index.constant_or_zero() * scale_size(scale))) {
    1.58 +    if (!index.is_register())  scale = Address::no_scale;
    1.59 +    assert(!_index->is_valid() == (scale == Address::no_scale),
    1.60 +           "inconsistent address");
    1.61 +  }
    1.62 +
    1.63  #endif // ASSERT
    1.64  
    1.65    // accessors
    1.66 @@ -240,7 +282,6 @@
    1.67  
    1.68    static Address make_array(ArrayAddress);
    1.69  
    1.70 -
    1.71   private:
    1.72    bool base_needs_rex() const {
    1.73      return _base != noreg && _base->encoding() >= 8;
    1.74 @@ -1393,17 +1434,20 @@
    1.75  
    1.76    // The following 4 methods return the offset of the appropriate move instruction
    1.77  
    1.78 -  // Support for fast byte/word loading with zero extension (depending on particular CPU)
    1.79 +  // Support for fast byte/short loading with zero extension (depending on particular CPU)
    1.80    int load_unsigned_byte(Register dst, Address src);
    1.81 -  int load_unsigned_word(Register dst, Address src);
    1.82 -
    1.83 -  // Support for fast byte/word loading with sign extension (depending on particular CPU)
    1.84 +  int load_unsigned_short(Register dst, Address src);
    1.85 +
    1.86 +  // Support for fast byte/short loading with sign extension (depending on particular CPU)
    1.87    int load_signed_byte(Register dst, Address src);
    1.88 -  int load_signed_word(Register dst, Address src);
    1.89 +  int load_signed_short(Register dst, Address src);
    1.90  
    1.91    // Support for sign-extension (hi:lo = extend_sign(lo))
    1.92    void extend_sign(Register hi, Register lo);
    1.93  
    1.94 +  // Loading values by size and signed-ness
    1.95 +  void load_sized_value(Register dst, Address src, int size_in_bytes, bool is_signed);
    1.96 +
    1.97    // Support for inc/dec with optimal instruction selection depending on value
    1.98  
    1.99    void increment(Register reg, int value = 1) { LP64_ONLY(incrementq(reg, value)) NOT_LP64(incrementl(reg, value)) ; }
   1.100 @@ -1763,6 +1807,10 @@
   1.101    // stack overflow + shadow pages.  Also, clobbers tmp
   1.102    void bang_stack_size(Register size, Register tmp);
   1.103  
   1.104 +  virtual RegisterConstant delayed_value(intptr_t* delayed_value_addr,
   1.105 +                                         Register tmp,
   1.106 +                                         int offset);
   1.107 +
   1.108    // Support for serializing memory accesses between threads
   1.109    void serialize_memory(Register thread, Register tmp);
   1.110  

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