1.1 --- a/src/cpu/sparc/vm/assembler_sparc.hpp Wed Jun 04 13:51:09 2008 -0700
1.2 +++ b/src/cpu/sparc/vm/assembler_sparc.hpp Thu Jun 05 15:57:56 2008 -0700
1.3 @@ -1439,7 +1439,11 @@
1.4 // pp 214
1.5
1.6 void save( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | rs2(s2) ); }
1.7 - void save( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
1.8 + void save( Register s1, int simm13a, Register d ) {
1.9 + // make sure frame is at least large enough for the register save area
1.10 + assert(-simm13a >= 16 * wordSize, "frame too small");
1.11 + emit_long( op(arith_op) | rd(d) | op3(save_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) );
1.12 + }
1.13
1.14 void restore( Register s1 = G0, Register s2 = G0, Register d = G0 ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | rs2(s2) ); }
1.15 void restore( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(restore_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
1.16 @@ -1594,6 +1598,11 @@
1.17 inline void wrasi( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(3, 29, 25)); }
1.18 inline void wrfprs( Register d) { v9_only(); emit_long( op(arith_op) | rs1(d) | op3(wrreg_op3) | u_field(6, 29, 25)); }
1.19
1.20 + // For a given register condition, return the appropriate condition code
1.21 + // Condition (the one you would use to get the same effect after "tst" on
1.22 + // the target register.)
1.23 + Assembler::Condition reg_cond_to_cc_cond(RCondition in);
1.24 +
1.25
1.26 // Creation
1.27 Assembler(CodeBuffer* code) : AbstractAssembler(code) {
1.28 @@ -1630,6 +1639,8 @@
1.29
1.30 // restore global registers in case C code disturbed them
1.31 static void restore_registers(MacroAssembler* a, Register r);
1.32 +
1.33 +
1.34 };
1.35
1.36
1.37 @@ -1722,6 +1733,12 @@
1.38 void br_null ( Register s1, bool a, Predict p, Label& L );
1.39 void br_notnull( Register s1, bool a, Predict p, Label& L );
1.40
1.41 + // These versions will do the most efficient thing on v8 and v9. Perhaps
1.42 + // this is what the routine above was meant to do, but it didn't (and
1.43 + // didn't cover both target address kinds.)
1.44 + void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, address d, relocInfo::relocType rt = relocInfo::none );
1.45 + void br_on_reg_cond( RCondition c, bool a, Predict p, Register s1, Label& L);
1.46 +
1.47 inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
1.48 inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
1.49
1.50 @@ -2055,9 +2072,23 @@
1.51 #endif // ASSERT
1.52
1.53 public:
1.54 - // Stores
1.55 - void store_check(Register tmp, Register obj); // store check for obj - register is destroyed afterwards
1.56 - void store_check(Register tmp, Register obj, Register offset); // store check for obj - register is destroyed afterwards
1.57 +
1.58 + // Write to card table for - register is destroyed afterwards.
1.59 + void card_table_write(jbyte* byte_map_base, Register tmp, Register obj);
1.60 +
1.61 + void card_write_barrier_post(Register store_addr, Register new_val, Register tmp);
1.62 +
1.63 +#ifndef SERIALGC
1.64 + // Array store and offset
1.65 + void g1_write_barrier_pre(Register obj, Register index, int offset, Register tmp, bool preserve_o_regs);
1.66 +
1.67 + void g1_write_barrier_post(Register store_addr, Register new_val, Register tmp);
1.68 +
1.69 + // May do filtering, depending on the boolean arguments.
1.70 + void g1_card_table_write(jbyte* byte_map_base,
1.71 + Register tmp, Register obj, Register new_val,
1.72 + bool region_filter, bool null_filter);
1.73 +#endif // SERIALGC
1.74
1.75 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
1.76 void push_fTOS();
