1.1 --- a/src/cpu/ppc/vm/macroAssembler_ppc.cpp Thu Nov 05 11:42:42 2015 +0100
1.2 +++ b/src/cpu/ppc/vm/macroAssembler_ppc.cpp Tue May 07 20:38:26 2019 +0000
1.3 @@ -1,6 +1,6 @@
1.4 /*
1.5 - * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
1.6 - * Copyright (c) 2012, 2018, SAP SE. All rights reserved.
1.7 + * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
1.8 + * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
1.9 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.10 *
1.11 * This code is free software; you can redistribute it and/or modify it
1.12 @@ -2220,6 +2220,34 @@
1.13 stbx(R0, Rtmp, Robj);
1.14 }
1.15
1.16 +// Kills R31 if value is a volatile register.
1.17 +void MacroAssembler::resolve_jobject(Register value, Register tmp1, Register tmp2, bool needs_frame) {
1.18 + Label done;
1.19 + cmpdi(CCR0, value, 0);
1.20 + beq(CCR0, done); // Use NULL as-is.
1.21 +
1.22 + clrrdi(tmp1, value, JNIHandles::weak_tag_size);
1.23 +#if INCLUDE_ALL_GCS
1.24 + if (UseG1GC) { andi_(tmp2, value, JNIHandles::weak_tag_mask); }
1.25 +#endif
1.26 + ld(value, 0, tmp1); // Resolve (untagged) jobject.
1.27 +
1.28 +#if INCLUDE_ALL_GCS
1.29 + if (UseG1GC) {
1.30 + Label not_weak;
1.31 + beq(CCR0, not_weak); // Test for jweak tag.
1.32 + verify_oop(value);
1.33 + g1_write_barrier_pre(noreg, // obj
1.34 + noreg, // offset
1.35 + value, // pre_val
1.36 + tmp1, tmp2, needs_frame);
1.37 + bind(not_weak);
1.38 + }
1.39 +#endif // INCLUDE_ALL_GCS
1.40 + verify_oop(value);
1.41 + bind(done);
1.42 +}
1.43 +
1.44 #if INCLUDE_ALL_GCS
1.45 // General G1 pre-barrier generator.
1.46 // Goal: record the previous value if it is not null.
1.47 @@ -2281,7 +2309,7 @@
1.48
1.49 bind(runtime);
1.50
1.51 - // VM call need frame to access(write) O register.
1.52 + // May need to preserve LR. Also needed if current frame is not compatible with C calling convention.
1.53 if (needs_frame) {
1.54 save_LR_CR(Rtmp1);
1.55 push_frame_reg_args(0, Rtmp2);
