1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/mips/vm/relocInfo_mips.cpp Fri Apr 29 00:06:10 2016 +0800
1.3 @@ -0,0 +1,187 @@
1.4 +/*
1.5 + * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
1.7 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 + *
1.9 + * This code is free software; you can redistribute it and/or modify it
1.10 + * under the terms of the GNU General Public License version 2 only, as
1.11 + * published by the Free Software Foundation.
1.12 + *
1.13 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.14 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.15 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.16 + * version 2 for more details (a copy is included in the LICENSE file that
1.17 + * accompanied this code).
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License version
1.20 + * 2 along with this work; if not, write to the Free Software Foundation,
1.21 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.22 + *
1.23 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.24 + * or visit www.oracle.com if you need additional information or have any
1.25 + * questions.
1.26 + *
1.27 + */
1.28 +
1.29 +#include "precompiled.hpp"
1.30 +#include "asm/macroAssembler.hpp"
1.31 +#include "code/relocInfo.hpp"
1.32 +#include "nativeInst_mips.hpp"
1.33 +#include "oops/oop.inline.hpp"
1.34 +#include "runtime/safepoint.hpp"
1.35 +
1.36 +
1.37 +void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
1.38 +#ifdef _LP64
1.39 + x += o;
1.40 + typedef Assembler::WhichOperand WhichOperand;
1.41 + WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
1.42 + assert(which == Assembler::disp32_operand ||
1.43 + which == Assembler::narrow_oop_operand ||
1.44 + which == Assembler::imm_operand, "format unpacks ok");
1.45 + if (which == Assembler::imm_operand) {
1.46 + if (verify_only) {
1.47 + assert(nativeMovConstReg_at(addr())->data() == (long)x, "instructions must match");
1.48 + } else {
1.49 + nativeMovConstReg_at(addr())->set_data((intptr_t)(x));
1.50 + }
1.51 + } else if (which == Assembler::narrow_oop_operand) {
1.52 + // both compressed oops and compressed classes look the same
1.53 + if (Universe::heap()->is_in_reserved((oop)x)) {
1.54 + if (verify_only) {
1.55 + assert(nativeMovConstReg_at(addr())->data() == (long)oopDesc::encode_heap_oop((oop)x), "instructions must match");
1.56 + } else {
1.57 + nativeMovConstReg_at(addr())->set_data((intptr_t)(oopDesc::encode_heap_oop((oop)x)));
1.58 + }
1.59 + } else {
1.60 + if (verify_only) {
1.61 + assert(nativeMovConstReg_at(addr())->data() == (long)Klass::encode_klass((Klass*)x), "instructions must match");
1.62 + } else {
1.63 + nativeMovConstReg_at(addr())->set_data((intptr_t)(Klass::encode_klass((Klass*)x)));
1.64 + }
1.65 + }
1.66 + } else {
1.67 + // Note: Use runtime_call_type relocations for call32_operand.
1.68 + assert(0, "call32_operand not supported in MIPS64");
1.69 + }
1.70 +#else
1.71 + if (verify_only) {
1.72 + assert(*pd_address_in_code() == (x + o), "instructions must match");
1.73 + } else {
1.74 + *pd_address_in_code() = x + o;
1.75 + }
1.76 +#endif // AMD64
1.77 +}
1.78 +
1.79 +
1.80 +//NOTICE HERE, this relocate is not need for MIPS, since MIPS USE abosolutly target,
1.81 +//Maybe We should FORGET CALL RELOCATION
1.82 +address Relocation::pd_call_destination(address orig_addr) {
1.83 + intptr_t adj = 0;
1.84 + NativeInstruction* ni = nativeInstruction_at(addr());
1.85 + if (ni->is_call()) {
1.86 + return nativeCall_at(addr())->destination() + adj;
1.87 + } else if (ni->is_jump()) {
1.88 + //return nativeJump_at(addr())->jump_destination() + adj;
1.89 + return nativeGeneralJump_at(addr())->jump_destination() + adj;
1.90 + } else if (ni->is_cond_jump()) {
1.91 + return nativeCondJump_at(addr())->jump_destination() +adj;
1.92 + } else {
1.93 + ShouldNotReachHere();
1.94 + return NULL;
1.95 + }
1.96 +}
1.97 +
1.98 +
1.99 +void Relocation::pd_set_call_destination(address x) {
1.100 + NativeInstruction* ni = nativeInstruction_at(addr());
1.101 + if (ni->is_call()) {
1.102 + nativeCall_at(addr())->set_destination(x);
1.103 + } else if (ni->is_jump())
1.104 + //NativeJump* nj = nativeJump_at(addr());
1.105 + nativeGeneralJump_at(addr())->set_jump_destination(x);
1.106 + else if (ni->is_cond_jump())
1.107 + nativeCondJump_at(addr())->set_jump_destination(x);
1.108 + else
1.109 + { ShouldNotReachHere(); }
1.110 +
1.111 + // Unresolved jumps are recognized by a destination of -1
1.112 + // However 64bit can't actually produce such an address
1.113 + // and encodes a jump to self but jump_destination will
1.114 + // return a -1 as the signal. We must not relocate this
1.115 + // jmp or the ic code will not see it as unresolved.
1.116 +/*
1.117 + if (nj->jump_destination() == (address) -1) {
1.118 + x = addr(); // jump to self
1.119 + }
1.120 + nj->set_jump_destination(x);
1.121 + } else if (ni->is_cond_jump()) {
1.122 + // %%%% kludge this, for now, until we get a jump_destination method
1.123 + address old_dest = nativeGeneralJump_at(addr())->jump_destination();
1.124 + address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
1.125 + *(jint*)disp += (x - old_dest);
1.126 + } else if (ni->is_mov_literal64()) {
1.127 + ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
1.128 + } else {
1.129 + ShouldNotReachHere();
1.130 + }
1.131 +*/
1.132 +}
1.133 +
1.134 +
1.135 +address* Relocation::pd_address_in_code() {
1.136 + //ShouldNotReachHere();
1.137 + return (address*)addr();
1.138 +}
1.139 +
1.140 +
1.141 +address Relocation::pd_get_address_from_code() {
1.142 + tty->print_cr("%s: %d", __func__, __LINE__); //aoqi_test
1.143 + NativeMovConstReg* ni = nativeMovConstReg_at(addr());
1.144 + return (address)ni->data();
1.145 +}
1.146 +
1.147 +
1.148 +/*
1.149 +int Relocation::pd_breakpoint_size() {
1.150 + // minimum breakpoint size, in short words
1.151 + return NativeIllegalInstruction::instruction_size / sizeof(short);
1.152 +}
1.153 +
1.154 +void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
1.155 + Untested("pd_swap_in_breakpoint");
1.156 + if (instrs != NULL) {
1.157 + assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
1.158 + for (int i = 0; i < instrlen; i++) {
1.159 + instrs[i] = ((short*)x)[i];
1.160 + }
1.161 + }
1.162 + NativeIllegalInstruction::insert(x);
1.163 +}
1.164 +
1.165 +void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
1.166 + Untested("pd_swap_out_breakpoint");
1.167 + assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update");
1.168 + NativeInstruction* ni = nativeInstruction_at(x);
1.169 + *(short*)ni->addr_at(0) = instrs[0];
1.170 +}
1.171 +*/
1.172 +
1.173 +void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
1.174 +// Unimplemented();
1.175 +}
1.176 +
1.177 +void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
1.178 +// Unimplemented();
1.179 +}
1.180 +
1.181 +void internal_pc_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
1.182 + address target =0;
1.183 + NativeMovConstReg* ni = nativeMovConstReg_at(addr());
1.184 + target = new_addr_for((address)ni->data(), src, dest);
1.185 + ni->set_data((intptr_t)target);
1.186 +}
1.187 +
1.188 +void metadata_Relocation::pd_fix_value(address x) {
1.189 +}
1.190 +
