1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/mips/vm/c1_LinearScan_mips.hpp Fri Apr 29 00:06:10 2016 +0800
1.3 @@ -0,0 +1,74 @@
1.4 +/*
1.5 + * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
1.6 + * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
1.7 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 + *
1.9 + * This code is free software; you can redistribute it and/or modify it
1.10 + * under the terms of the GNU General Public License version 2 only, as
1.11 + * published by the Free Software Foundation.
1.12 + *
1.13 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.14 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.15 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.16 + * version 2 for more details (a copy is included in the LICENSE file that
1.17 + * accompanied this code).
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License version
1.20 + * 2 along with this work; if not, write to the Free Software Foundation,
1.21 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.22 + *
1.23 + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1.24 + * or visit www.oracle.com if you need additional information or have any
1.25 + * questions.
1.26 + *
1.27 + */
1.28 +
1.29 +inline bool LinearScan::is_processed_reg_num(int reg_num) {
1.30 + return reg_num < 26 || reg_num > 30;
1.31 +}
1.32 +
1.33 +inline int LinearScan::num_physical_regs(BasicType type) {
1.34 + if (type == T_LONG || type== T_DOUBLE || type == T_FLOAT) {
1.35 + return 2;
1.36 + }
1.37 + return 1;
1.38 +}
1.39 +
1.40 +
1.41 +inline bool LinearScan::requires_adjacent_regs(BasicType type) {
1.42 + return type == T_FLOAT || type == T_DOUBLE;
1.43 +}
1.44 +
1.45 +inline bool LinearScan::is_caller_save(int assigned_reg) {
1.46 + assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");
1.47 + // return true; // no callee-saved registers on Intel
1.48 + //FIXME, here, MIPS indeed got callee-saved registers
1.49 + return true;
1.50 +}
1.51 +
1.52 +
1.53 +inline void LinearScan::pd_add_temps(LIR_Op* op) {
1.54 +}
1.55 +
1.56 +
1.57 +// Implementation of LinearScanWalker
1.58 +
1.59 +inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
1.60 + if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) {
1.61 + assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only");
1.62 + _first_reg = pd_first_callee_saved_reg;
1.63 +// _first_reg = 8;
1.64 + _last_reg = pd_last_callee_saved_reg;
1.65 + return true;
1.66 + } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT) {
1.67 +// _first_reg = pd_first_cpu_reg;
1.68 +#ifdef _LP64
1.69 + _first_reg = 12; /* From T0 */
1.70 +#else
1.71 + _first_reg = 8; /* From T0 */
1.72 +#endif
1.73 + _last_reg = pd_last_allocatable_cpu_reg;
1.74 + return true;
1.75 + }
1.76 + return false;
1.77 +}
