1.1 --- a/src/cpu/ppc/vm/vm_version_ppc.cpp Sat Nov 09 20:15:27 2019 +0800
1.2 +++ b/src/cpu/ppc/vm/vm_version_ppc.cpp Sat Nov 09 20:29:45 2019 +0800
1.3 @@ -110,7 +110,7 @@
1.4 // Create and print feature-string.
1.5 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
1.6 jio_snprintf(buf, sizeof(buf),
1.7 - "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s",
1.8 + "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
1.9 (has_fsqrt() ? " fsqrt" : ""),
1.10 (has_isel() ? " isel" : ""),
1.11 (has_lxarxeh() ? " lxarxeh" : ""),
1.12 @@ -124,7 +124,8 @@
1.13 (has_vcipher() ? " aes" : ""),
1.14 (has_vpmsumb() ? " vpmsumb" : ""),
1.15 (has_mfdscr() ? " mfdscr" : ""),
1.16 - (has_vsx() ? " vsx" : "")
1.17 + (has_vsx() ? " vsx" : ""),
1.18 + (has_vshasig() ? " sha" : "")
1.19 // Make sure number of %s matches num_features!
1.20 );
1.21 _features_str = strdup(buf);
1.22 @@ -173,7 +174,6 @@
1.23 }
1.24
1.25 // The AES intrinsic stubs require AES instruction support.
1.26 -#if defined(VM_LITTLE_ENDIAN)
1.27 if (has_vcipher()) {
1.28 if (FLAG_IS_DEFAULT(UseAES)) {
1.29 UseAES = true;
1.30 @@ -194,29 +194,43 @@
1.31 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.32 }
1.33
1.34 -#else
1.35 - if (UseAES) {
1.36 - warning("AES instructions are not available on this CPU");
1.37 - FLAG_SET_DEFAULT(UseAES, false);
1.38 - }
1.39 - if (UseAESIntrinsics) {
1.40 - if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
1.41 - warning("AES intrinsics are not available on this CPU");
1.42 - FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.43 - }
1.44 -#endif
1.45 -
1.46 - if (UseSHA) {
1.47 - warning("SHA instructions are not available on this CPU");
1.48 + if (has_vshasig()) {
1.49 + if (FLAG_IS_DEFAULT(UseSHA)) {
1.50 + UseSHA = true;
1.51 + }
1.52 + } else if (UseSHA) {
1.53 + if (!FLAG_IS_DEFAULT(UseSHA))
1.54 + warning("SHA instructions are not available on this CPU");
1.55 FLAG_SET_DEFAULT(UseSHA, false);
1.56 }
1.57 - if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
1.58 - warning("SHA intrinsics are not available on this CPU");
1.59 +
1.60 + if (UseSHA1Intrinsics) {
1.61 + warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
1.62 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
1.63 + }
1.64 +
1.65 + if (UseSHA && has_vshasig()) {
1.66 + if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
1.67 + FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
1.68 + }
1.69 + } else if (UseSHA256Intrinsics) {
1.70 + warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
1.71 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
1.72 + }
1.73 +
1.74 + if (UseSHA && has_vshasig()) {
1.75 + if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
1.76 + FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
1.77 + }
1.78 + } else if (UseSHA512Intrinsics) {
1.79 + warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
1.80 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
1.81 }
1.82
1.83 + if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
1.84 + FLAG_SET_DEFAULT(UseSHA, false);
1.85 + }
1.86 +
1.87 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
1.88 UseMontgomeryMultiplyIntrinsic = true;
1.89 }
1.90 @@ -503,6 +517,7 @@
1.91 a->vpmsumb(VR0, VR1, VR2); // code[12] -> vpmsumb
1.92 a->mfdscr(R0); // code[13] -> mfdscr
1.93 a->lxvd2x(VSR0, R3_ARG1); // code[14] -> vsx
1.94 + a->vshasigmaw(VR0, VR1, 1, 0xF); // code[15] -> vshasig
1.95 a->blr();
1.96
1.97 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
1.98 @@ -551,6 +566,7 @@
1.99 if (code[feature_cntr++]) features |= vpmsumb_m;
1.100 if (code[feature_cntr++]) features |= mfdscr_m;
1.101 if (code[feature_cntr++]) features |= vsx_m;
1.102 + if (code[feature_cntr++]) features |= vshasig_m;
1.103
1.104 // Print the detection code.
1.105 if (PrintAssembly) {
