1.1 --- a/src/cpu/sparc/vm/interp_masm_sparc.cpp Mon Jul 23 13:04:59 2012 -0700
1.2 +++ b/src/cpu/sparc/vm/interp_masm_sparc.cpp Tue Jul 24 10:51:00 2012 -0700
1.3 @@ -505,7 +505,7 @@
1.4 void InterpreterMacroAssembler::load_receiver(Register param_count,
1.5 Register recv) {
1.6 sll(param_count, Interpreter::logStackElementSize, param_count);
1.7 - ld_ptr(Lesp, param_count, recv); // gets receiver Oop
1.8 + ld_ptr(Lesp, param_count, recv); // gets receiver oop
1.9 }
1.10
1.11 void InterpreterMacroAssembler::empty_expression_stack() {
1.12 @@ -767,8 +767,12 @@
1.13 get_cache_and_index_at_bcp(cache, temp, bcp_offset, index_size);
1.14 ld_ptr(cache, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset(), bytecode);
1.15 const int shift_count = (1 + byte_no) * BitsPerByte;
1.16 - srl( bytecode, shift_count, bytecode);
1.17 - and3(bytecode, 0xFF, bytecode);
1.18 + assert((byte_no == TemplateTable::f1_byte && shift_count == ConstantPoolCacheEntry::bytecode_1_shift) ||
1.19 + (byte_no == TemplateTable::f2_byte && shift_count == ConstantPoolCacheEntry::bytecode_2_shift),
1.20 + "correct shift count");
1.21 + srl(bytecode, shift_count, bytecode);
1.22 + assert(ConstantPoolCacheEntry::bytecode_1_mask == ConstantPoolCacheEntry::bytecode_2_mask, "common mask");
1.23 + and3(bytecode, ConstantPoolCacheEntry::bytecode_1_mask, bytecode);
1.24 }
1.25
1.26
