1.1 --- a/src/cpu/sparc/vm/sparc.ad Tue Oct 06 02:11:49 2009 -0700
1.2 +++ b/src/cpu/sparc/vm/sparc.ad Tue Oct 06 10:15:38 2009 -0700
1.3 @@ -193,38 +193,38 @@
1.4 // I believe we can't handle callee-save doubles D32 and up until
1.5 // the place in the sparc stack crawler that asserts on the 255 is
1.6 // fixed up.
1.7 -reg_def R_D32x(SOC, SOC, Op_RegD,255, F32->as_VMReg());
1.8 -reg_def R_D32 (SOC, SOC, Op_RegD, 1, F32->as_VMReg()->next());
1.9 -reg_def R_D34x(SOC, SOC, Op_RegD,255, F34->as_VMReg());
1.10 -reg_def R_D34 (SOC, SOC, Op_RegD, 3, F34->as_VMReg()->next());
1.11 -reg_def R_D36x(SOC, SOC, Op_RegD,255, F36->as_VMReg());
1.12 -reg_def R_D36 (SOC, SOC, Op_RegD, 5, F36->as_VMReg()->next());
1.13 -reg_def R_D38x(SOC, SOC, Op_RegD,255, F38->as_VMReg());
1.14 -reg_def R_D38 (SOC, SOC, Op_RegD, 7, F38->as_VMReg()->next());
1.15 -reg_def R_D40x(SOC, SOC, Op_RegD,255, F40->as_VMReg());
1.16 -reg_def R_D40 (SOC, SOC, Op_RegD, 9, F40->as_VMReg()->next());
1.17 -reg_def R_D42x(SOC, SOC, Op_RegD,255, F42->as_VMReg());
1.18 -reg_def R_D42 (SOC, SOC, Op_RegD, 11, F42->as_VMReg()->next());
1.19 -reg_def R_D44x(SOC, SOC, Op_RegD,255, F44->as_VMReg());
1.20 -reg_def R_D44 (SOC, SOC, Op_RegD, 13, F44->as_VMReg()->next());
1.21 -reg_def R_D46x(SOC, SOC, Op_RegD,255, F46->as_VMReg());
1.22 -reg_def R_D46 (SOC, SOC, Op_RegD, 15, F46->as_VMReg()->next());
1.23 -reg_def R_D48x(SOC, SOC, Op_RegD,255, F48->as_VMReg());
1.24 -reg_def R_D48 (SOC, SOC, Op_RegD, 17, F48->as_VMReg()->next());
1.25 -reg_def R_D50x(SOC, SOC, Op_RegD,255, F50->as_VMReg());
1.26 -reg_def R_D50 (SOC, SOC, Op_RegD, 19, F50->as_VMReg()->next());
1.27 -reg_def R_D52x(SOC, SOC, Op_RegD,255, F52->as_VMReg());
1.28 -reg_def R_D52 (SOC, SOC, Op_RegD, 21, F52->as_VMReg()->next());
1.29 -reg_def R_D54x(SOC, SOC, Op_RegD,255, F54->as_VMReg());
1.30 -reg_def R_D54 (SOC, SOC, Op_RegD, 23, F54->as_VMReg()->next());
1.31 -reg_def R_D56x(SOC, SOC, Op_RegD,255, F56->as_VMReg());
1.32 -reg_def R_D56 (SOC, SOC, Op_RegD, 25, F56->as_VMReg()->next());
1.33 -reg_def R_D58x(SOC, SOC, Op_RegD,255, F58->as_VMReg());
1.34 -reg_def R_D58 (SOC, SOC, Op_RegD, 27, F58->as_VMReg()->next());
1.35 -reg_def R_D60x(SOC, SOC, Op_RegD,255, F60->as_VMReg());
1.36 -reg_def R_D60 (SOC, SOC, Op_RegD, 29, F60->as_VMReg()->next());
1.37 -reg_def R_D62x(SOC, SOC, Op_RegD,255, F62->as_VMReg());
1.38 -reg_def R_D62 (SOC, SOC, Op_RegD, 31, F62->as_VMReg()->next());
1.39 +reg_def R_D32 (SOC, SOC, Op_RegD, 1, F32->as_VMReg());
1.40 +reg_def R_D32x(SOC, SOC, Op_RegD,255, F32->as_VMReg()->next());
1.41 +reg_def R_D34 (SOC, SOC, Op_RegD, 3, F34->as_VMReg());
1.42 +reg_def R_D34x(SOC, SOC, Op_RegD,255, F34->as_VMReg()->next());
1.43 +reg_def R_D36 (SOC, SOC, Op_RegD, 5, F36->as_VMReg());
1.44 +reg_def R_D36x(SOC, SOC, Op_RegD,255, F36->as_VMReg()->next());
1.45 +reg_def R_D38 (SOC, SOC, Op_RegD, 7, F38->as_VMReg());
1.46 +reg_def R_D38x(SOC, SOC, Op_RegD,255, F38->as_VMReg()->next());
1.47 +reg_def R_D40 (SOC, SOC, Op_RegD, 9, F40->as_VMReg());
1.48 +reg_def R_D40x(SOC, SOC, Op_RegD,255, F40->as_VMReg()->next());
1.49 +reg_def R_D42 (SOC, SOC, Op_RegD, 11, F42->as_VMReg());
1.50 +reg_def R_D42x(SOC, SOC, Op_RegD,255, F42->as_VMReg()->next());
1.51 +reg_def R_D44 (SOC, SOC, Op_RegD, 13, F44->as_VMReg());
1.52 +reg_def R_D44x(SOC, SOC, Op_RegD,255, F44->as_VMReg()->next());
1.53 +reg_def R_D46 (SOC, SOC, Op_RegD, 15, F46->as_VMReg());
1.54 +reg_def R_D46x(SOC, SOC, Op_RegD,255, F46->as_VMReg()->next());
1.55 +reg_def R_D48 (SOC, SOC, Op_RegD, 17, F48->as_VMReg());
1.56 +reg_def R_D48x(SOC, SOC, Op_RegD,255, F48->as_VMReg()->next());
1.57 +reg_def R_D50 (SOC, SOC, Op_RegD, 19, F50->as_VMReg());
1.58 +reg_def R_D50x(SOC, SOC, Op_RegD,255, F50->as_VMReg()->next());
1.59 +reg_def R_D52 (SOC, SOC, Op_RegD, 21, F52->as_VMReg());
1.60 +reg_def R_D52x(SOC, SOC, Op_RegD,255, F52->as_VMReg()->next());
1.61 +reg_def R_D54 (SOC, SOC, Op_RegD, 23, F54->as_VMReg());
1.62 +reg_def R_D54x(SOC, SOC, Op_RegD,255, F54->as_VMReg()->next());
1.63 +reg_def R_D56 (SOC, SOC, Op_RegD, 25, F56->as_VMReg());
1.64 +reg_def R_D56x(SOC, SOC, Op_RegD,255, F56->as_VMReg()->next());
1.65 +reg_def R_D58 (SOC, SOC, Op_RegD, 27, F58->as_VMReg());
1.66 +reg_def R_D58x(SOC, SOC, Op_RegD,255, F58->as_VMReg()->next());
1.67 +reg_def R_D60 (SOC, SOC, Op_RegD, 29, F60->as_VMReg());
1.68 +reg_def R_D60x(SOC, SOC, Op_RegD,255, F60->as_VMReg()->next());
1.69 +reg_def R_D62 (SOC, SOC, Op_RegD, 31, F62->as_VMReg());
1.70 +reg_def R_D62x(SOC, SOC, Op_RegD,255, F62->as_VMReg()->next());
1.71
1.72
1.73 // ----------------------------
