1.1 --- a/src/share/vm/opto/output.cpp Thu Sep 22 13:16:27 2016 -0700
1.2 +++ b/src/share/vm/opto/output.cpp Thu May 24 17:06:56 2018 +0800
1.3 @@ -22,6 +22,12 @@
1.4 *
1.5 */
1.6
1.7 +/*
1.8 + * This file has been modified by Loongson Technology in 2015. These
1.9 + * modifications are Copyright (c) 2015 Loongson Technology, and are made
1.10 + * available on the same license terms set forth above.
1.11 + */
1.12 +
1.13 #include "precompiled.hpp"
1.14 #include "asm/assembler.inline.hpp"
1.15 #include "code/compiledIC.hpp"
1.16 @@ -843,6 +849,29 @@
1.17 // Add the safepoint in the DebugInfoRecorder
1.18 if( !mach->is_MachCall() ) {
1.19 mcall = NULL;
1.20 +#ifdef MIPS64
1.21 +/*
1.22 + 2013/10/30 Jin: safepoint_pc_offset should point to tha last instruction in safePoint.
1.23 + In X86 and sparc, their safePoints only contain one instruction.
1.24 + However, we should add current_offset with the size of safePoint in MIPS.
1.25 + 0x2d6ff22c: lw s2, 0x14(s2)
1.26 + last_pd->pc_offset()=308, pc_offset=304, bci=64
1.27 + last_pd->pc_offset()=312, pc_offset=312, bci=64
1.28 + /mnt/openjdk6/hotspot/src/share/vm/code/debugInfoRec.cpp, 289 , assert(last_pd->pc_offset() == pc_offset,"must be last pc")
1.29 +
1.30 + ;; Safepoint:
1.31 + ---> pc_offset=304
1.32 + 0x2d6ff230: lui at, 0x2b7a ; OopMap{s2=Oop s5=Oop t4=Oop off=308}
1.33 + ;*goto
1.34 + ; - java.util.Hashtable::get@64 (line 353)
1.35 + ---> last_pd(308)
1.36 + 0x2d6ff234: lw at, 0xffffc100(at) ;*goto
1.37 + ; - java.util.Hashtable::get@64 (line 353)
1.38 + ; {poll}
1.39 + 0x2d6ff238: addiu s0, zero, 0x0
1.40 +*/
1.41 + safepoint_pc_offset += sfn->size(_regalloc) - 4;
1.42 +#endif
1.43 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
1.44 } else {
1.45 mcall = mach->as_MachCall();
1.46 @@ -1501,6 +1530,22 @@
1.47 DEBUG_ONLY( uint instr_offset = cb->insts_size(); )
1.48 n->emit(*cb, _regalloc);
1.49 current_offset = cb->insts_size();
1.50 +#ifdef MIPS64
1.51 + if (!n->is_Proj()) {
1.52 + // For MIPS, the first instruction of the previous node (usually a instruction sequence) sometime
1.53 + // is not the instruction which access memory. adjust is needed. previous_offset points to the
1.54 + // instruction which access memory. Instruction size is 4. cb->insts_size() and
1.55 + // cb->insts()->end() are the location of current instruction.
1.56 + int adjust = 4;
1.57 + NativeInstruction* inst = (NativeInstruction*) (cb->insts()->end() - 4);
1.58 + if (inst->is_sync()) {
1.59 + // a sync may be the last instruction, see store_B_immI_enc_sync
1.60 + adjust += 4;
1.61 + inst = (NativeInstruction*) (cb->insts()->end() - 8);
1.62 + }
1.63 + previous_offset = current_offset - adjust;
1.64 + }
1.65 +#endif
1.66
1.67 // Above we only verified that there is enough space in the instruction section.
1.68 // However, the instruction may emit stubs that cause code buffer expansion.
