src/cpu/sparc/vm/sparc.ad

changeset 6287
f970454708b8
parent 6184
9ecf408d4568
child 6288
984401824c5e
equal deleted inserted replaced
6286:709018897c81 6287:f970454708b8
5718 instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{ 5718 instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{
5719 match(Set dst (ConvI2L (AndI (LoadUS mem) mask))); 5719 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5720 effect(TEMP dst, TEMP tmp); 5720 effect(TEMP dst, TEMP tmp);
5721 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST); 5721 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5722 5722
5723 size((3+1)*4); // set may use two instructions.
5724 format %{ "LDUH $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t" 5723 format %{ "LDUH $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
5725 "SET $mask,$tmp\n\t" 5724 "SET $mask,$tmp\n\t"
5726 "AND $dst,$tmp,$dst" %} 5725 "AND $dst,$tmp,$dst" %}
5727 ins_encode %{ 5726 ins_encode %{
5728 Register Rdst = $dst$$Register; 5727 Register Rdst = $dst$$Register;
5862 instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{ 5861 instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
5863 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5862 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5864 effect(TEMP dst, TEMP tmp); 5863 effect(TEMP dst, TEMP tmp);
5865 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST); 5864 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5866 5865
5867 size((3+1)*4); // set may use two instructions.
5868 format %{ "LDUW $mem,$dst\t! int & 32-bit mask -> long\n\t" 5866 format %{ "LDUW $mem,$dst\t! int & 32-bit mask -> long\n\t"
5869 "SET $mask,$tmp\n\t" 5867 "SET $mask,$tmp\n\t"
5870 "AND $dst,$tmp,$dst" %} 5868 "AND $dst,$tmp,$dst" %}
5871 ins_encode %{ 5869 ins_encode %{
5872 Register Rdst = $dst$$Register; 5870 Register Rdst = $dst$$Register;

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