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1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 * |
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23 */ |
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24 |
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25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
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26 #define SHARE_VM_OPTO_MACHNODE_HPP |
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27 |
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28 #include "opto/callnode.hpp" |
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29 #include "opto/matcher.hpp" |
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30 #include "opto/multnode.hpp" |
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31 #include "opto/node.hpp" |
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32 #include "opto/regmask.hpp" |
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33 |
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34 class BiasedLockingCounters; |
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35 class BufferBlob; |
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36 class CodeBuffer; |
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37 class JVMState; |
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38 class MachCallDynamicJavaNode; |
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39 class MachCallJavaNode; |
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40 class MachCallLeafNode; |
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41 class MachCallNode; |
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42 class MachCallRuntimeNode; |
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43 class MachCallStaticJavaNode; |
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44 class MachEpilogNode; |
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45 class MachIfNode; |
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46 class MachNullCheckNode; |
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47 class MachOper; |
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48 class MachProjNode; |
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49 class MachPrologNode; |
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50 class MachReturnNode; |
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51 class MachSafePointNode; |
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52 class MachSpillCopyNode; |
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53 class Matcher; |
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54 class PhaseRegAlloc; |
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55 class RegMask; |
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56 class RTMLockingCounters; |
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57 class State; |
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58 |
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59 //---------------------------MachOper------------------------------------------ |
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60 class MachOper : public ResourceObj { |
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61 public: |
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62 // Allocate right next to the MachNodes in the same arena |
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63 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } |
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64 |
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65 // Opcode |
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66 virtual uint opcode() const = 0; |
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67 |
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68 // Number of input edges. |
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69 // Generally at least 1 |
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70 virtual uint num_edges() const { return 1; } |
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71 // Array of Register masks |
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72 virtual const RegMask *in_RegMask(int index) const; |
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73 |
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74 // Methods to output the encoding of the operand |
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75 |
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76 // Negate conditional branches. Error for non-branch Nodes |
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77 virtual void negate(); |
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78 |
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79 // Return the value requested |
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80 // result register lookup, corresponding to int_format |
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81 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; |
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82 // input register lookup, corresponding to ext_format |
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83 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; |
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84 |
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85 // helpers for MacroAssembler generation from ADLC |
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86 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { |
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87 return ::as_Register(reg(ra_, node)); |
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88 } |
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89 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { |
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90 return ::as_Register(reg(ra_, node, idx)); |
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91 } |
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92 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { |
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93 return ::as_FloatRegister(reg(ra_, node)); |
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94 } |
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95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { |
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96 return ::as_FloatRegister(reg(ra_, node, idx)); |
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97 } |
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98 |
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99 #if defined(IA32) || defined(AMD64) |
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100 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { |
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101 return ::as_XMMRegister(reg(ra_, node)); |
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102 } |
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103 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { |
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104 return ::as_XMMRegister(reg(ra_, node, idx)); |
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105 } |
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106 #endif |
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107 // CondRegister reg converter |
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108 #if defined(PPC64) |
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109 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { |
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110 return ::as_ConditionRegister(reg(ra_, node)); |
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111 } |
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112 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { |
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113 return ::as_ConditionRegister(reg(ra_, node, idx)); |
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114 } |
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115 #endif |
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116 |
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117 virtual intptr_t constant() const; |
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118 virtual relocInfo::relocType constant_reloc() const; |
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119 virtual jdouble constantD() const; |
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120 virtual jfloat constantF() const; |
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121 virtual jlong constantL() const; |
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122 virtual TypeOopPtr *oop() const; |
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123 virtual int ccode() const; |
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124 // A zero, default, indicates this value is not needed. |
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125 // May need to lookup the base register, as done in int_ and ext_format |
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126 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; |
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127 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; |
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128 virtual int scale() const; |
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129 // Parameters needed to support MEMORY_INTERFACE access to stackSlot |
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130 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; |
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131 // Check for PC-Relative displacement |
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132 virtual relocInfo::relocType disp_reloc() const; |
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133 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot |
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134 virtual int base_position() const; // base edge position, or -1 |
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135 virtual int index_position() const; // index edge position, or -1 |
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136 |
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137 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP |
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138 // Only returns non-null value for i486.ad's indOffset32X |
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139 virtual const TypePtr *disp_as_type() const { return NULL; } |
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140 |
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141 // Return the label |
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142 virtual Label *label() const; |
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143 |
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144 // Return the method's address |
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145 virtual intptr_t method() const; |
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146 |
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147 // Hash and compare over operands are currently identical |
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148 virtual uint hash() const; |
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149 virtual uint cmp( const MachOper &oper ) const; |
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150 |
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151 // Virtual clone, since I do not know how big the MachOper is. |
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152 virtual MachOper *clone(Compile* C) const = 0; |
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153 |
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154 // Return ideal Type from simple operands. Fail for complex operands. |
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155 virtual const Type *type() const; |
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156 |
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157 // Set an integer offset if we have one, or error otherwise |
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158 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } |
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159 |
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160 #ifndef PRODUCT |
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161 // Return name of operand |
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162 virtual const char *Name() const { return "???";} |
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163 |
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164 // Methods to output the text version of the operand |
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165 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; |
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166 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; |
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167 |
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168 virtual void dump_spec(outputStream *st) const; // Print per-operand info |
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169 |
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170 // Check whether o is a valid oper. |
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171 static bool notAnOper(const MachOper *o) { |
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172 if (o == NULL) return true; |
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173 if (((intptr_t)o & 1) != 0) return true; |
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174 if (*(address*)o == badAddress) return true; // kill by Node::destruct |
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175 return false; |
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176 } |
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177 #endif // !PRODUCT |
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178 }; |
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179 |
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180 //------------------------------MachNode--------------------------------------- |
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181 // Base type for all machine specific nodes. All node classes generated by the |
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182 // ADLC inherit from this class. |
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183 class MachNode : public Node { |
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184 public: |
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185 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { |
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186 init_class_id(Class_Mach); |
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187 } |
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188 // Required boilerplate |
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189 virtual uint size_of() const { return sizeof(MachNode); } |
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190 virtual int Opcode() const; // Always equal to MachNode |
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191 virtual uint rule() const = 0; // Machine-specific opcode |
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192 // Number of inputs which come before the first operand. |
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193 // Generally at least 1, to skip the Control input |
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194 virtual uint oper_input_base() const { return 1; } |
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195 // Position of constant base node in node's inputs. -1 if |
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196 // no constant base node input. |
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197 virtual uint mach_constant_base_node_input() const { return (uint)-1; } |
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198 |
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199 // Copy inputs and operands to new node of instruction. |
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200 // Called from cisc_version() and short_branch_version(). |
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201 // !!!! The method's body is defined in ad_<arch>.cpp file. |
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202 void fill_new_machnode(MachNode *n, Compile* C) const; |
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203 |
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204 // Return an equivalent instruction using memory for cisc_operand position |
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205 virtual MachNode *cisc_version(int offset, Compile* C); |
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206 // Modify this instruction's register mask to use stack version for cisc_operand |
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207 virtual void use_cisc_RegMask(); |
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208 |
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209 // Support for short branches |
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210 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } |
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211 |
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212 // Avoid back to back some instructions on some CPUs. |
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213 enum AvoidBackToBackFlag { AVOID_NONE = 0, |
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214 AVOID_BEFORE = Flag_avoid_back_to_back_before, |
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215 AVOID_AFTER = Flag_avoid_back_to_back_after, |
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216 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; |
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217 |
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218 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { |
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219 return (flags() & flag_value) == flag_value; |
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220 } |
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221 |
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222 // instruction implemented with a call |
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223 bool has_call() const { return (flags() & Flag_has_call) != 0; } |
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224 |
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225 // First index in _in[] corresponding to operand, or -1 if there is none |
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226 int operand_index(uint operand) const; |
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227 int operand_index(const MachOper *oper) const; |
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228 |
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229 // Register class input is expected in |
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230 virtual const RegMask &in_RegMask(uint) const; |
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231 |
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232 // cisc-spillable instructions redefine for use by in_RegMask |
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233 virtual const RegMask *cisc_RegMask() const { return NULL; } |
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234 |
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235 // If this instruction is a 2-address instruction, then return the |
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236 // index of the input which must match the output. Not nessecary |
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237 // for instructions which bind the input and output register to the |
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238 // same singleton regiser (e.g., Intel IDIV which binds AX to be |
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239 // both an input and an output). It is nessecary when the input and |
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240 // output have choices - but they must use the same choice. |
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241 virtual uint two_adr( ) const { return 0; } |
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242 |
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243 // Array of complex operand pointers. Each corresponds to zero or |
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244 // more leafs. Must be set by MachNode constructor to point to an |
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245 // internal array of MachOpers. The MachOper array is sized by |
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246 // specific MachNodes described in the ADL. |
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247 uint _num_opnds; |
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248 MachOper **_opnds; |
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249 uint num_opnds() const { return _num_opnds; } |
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250 |
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251 // Emit bytes into cbuf |
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252 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
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253 // Expand node after register allocation. |
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254 // Node is replaced by several nodes in the postalloc expand phase. |
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255 // Corresponding methods are generated for nodes if they specify |
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256 // postalloc_expand. See block.cpp for more documentation. |
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257 virtual bool requires_postalloc_expand() const { return false; } |
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258 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
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259 // Size of instruction in bytes |
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260 virtual uint size(PhaseRegAlloc *ra_) const; |
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261 // Helper function that computes size by emitting code |
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262 virtual uint emit_size(PhaseRegAlloc *ra_) const; |
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263 |
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264 // Return the alignment required (in units of relocInfo::addr_unit()) |
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265 // for this instruction (must be a power of 2) |
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266 virtual int alignment_required() const { return 1; } |
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267 |
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268 // Return the padding (in bytes) to be emitted before this |
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269 // instruction to properly align it. |
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270 virtual int compute_padding(int current_offset) const { return 0; } |
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271 |
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272 // Return number of relocatable values contained in this instruction |
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273 virtual int reloc() const { return 0; } |
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274 |
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275 // Return number of words used for double constants in this instruction |
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276 virtual int ins_num_consts() const { return 0; } |
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277 |
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278 // Hash and compare over operands. Used to do GVN on machine Nodes. |
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279 virtual uint hash() const; |
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280 virtual uint cmp( const Node &n ) const; |
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281 |
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282 // Expand method for MachNode, replaces nodes representing pseudo |
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283 // instructions with a set of nodes which represent real machine |
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284 // instructions and compute the same value. |
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285 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
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286 |
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287 // Bottom_type call; value comes from operand0 |
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288 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } |
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289 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } |
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290 |
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291 // If this is a memory op, return the base pointer and fixed offset. |
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292 // If there are no such, return NULL. If there are multiple addresses |
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293 // or the address is indeterminate (rare cases) then return (Node*)-1, |
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294 // which serves as node bottom. |
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295 // If the offset is not statically determined, set it to Type::OffsetBot. |
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296 // This method is free to ignore stack slots if that helps. |
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297 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) |
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298 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible |
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299 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; |
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300 |
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301 // Helper for get_base_and_disp: find the base and index input nodes. |
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302 // Returns the MachOper as determined by memory_operand(), for use, if |
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303 // needed by the caller. If (MachOper *)-1 is returned, base and index |
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304 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and |
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305 // index are set to NULL. |
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306 const MachOper* memory_inputs(Node* &base, Node* &index) const; |
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307 |
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308 // Helper for memory_inputs: Which operand carries the necessary info? |
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309 // By default, returns NULL, which means there is no such operand. |
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310 // If it returns (MachOper*)-1, this means there are multiple memories. |
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311 virtual const MachOper* memory_operand() const { return NULL; } |
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312 |
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313 // Call "get_base_and_disp" to decide which category of memory is used here. |
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314 virtual const class TypePtr *adr_type() const; |
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315 |
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316 // Apply peephole rule(s) to this instruction |
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317 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); |
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318 |
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319 // Top-level ideal Opcode matched |
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320 virtual int ideal_Opcode() const { return Op_Node; } |
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321 |
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322 // Adds the label for the case |
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323 virtual void add_case_label( int switch_val, Label* blockLabel); |
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324 |
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325 // Set the absolute address for methods |
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326 virtual void method_set( intptr_t addr ); |
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327 |
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328 // Should we clone rather than spill this instruction? |
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329 bool rematerialize() const; |
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330 |
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331 // Get the pipeline info |
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332 static const Pipeline *pipeline_class(); |
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333 virtual const Pipeline *pipeline() const; |
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334 |
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335 // Returns true if this node is a check that can be implemented with a trap. |
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336 virtual bool is_TrapBasedCheckNode() const { return false; } |
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337 |
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338 #ifndef PRODUCT |
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339 virtual const char *Name() const = 0; // Machine-specific name |
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340 virtual void dump_spec(outputStream *st) const; // Print per-node info |
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341 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual |
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342 #endif |
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343 }; |
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344 |
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345 //------------------------------MachIdealNode---------------------------- |
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346 // Machine specific versions of nodes that must be defined by user. |
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347 // These are not converted by matcher from ideal nodes to machine nodes |
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348 // but are inserted into the code by the compiler. |
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349 class MachIdealNode : public MachNode { |
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350 public: |
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351 MachIdealNode( ) {} |
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352 |
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353 // Define the following defaults for non-matched machine nodes |
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354 virtual uint oper_input_base() const { return 0; } |
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355 virtual uint rule() const { return 9999999; } |
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356 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } |
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357 }; |
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358 |
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359 //------------------------------MachTypeNode---------------------------- |
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360 // Machine Nodes that need to retain a known Type. |
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361 class MachTypeNode : public MachNode { |
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362 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
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363 public: |
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364 MachTypeNode( ) {} |
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365 const Type *_bottom_type; |
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366 |
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367 virtual const class Type *bottom_type() const { return _bottom_type; } |
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368 #ifndef PRODUCT |
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369 virtual void dump_spec(outputStream *st) const; |
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370 #endif |
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371 }; |
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372 |
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373 //------------------------------MachBreakpointNode---------------------------- |
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374 // Machine breakpoint or interrupt Node |
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375 class MachBreakpointNode : public MachIdealNode { |
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376 public: |
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377 MachBreakpointNode( ) {} |
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378 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
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379 virtual uint size(PhaseRegAlloc *ra_) const; |
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380 |
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381 #ifndef PRODUCT |
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382 virtual const char *Name() const { return "Breakpoint"; } |
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383 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
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384 #endif |
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385 }; |
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386 |
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387 //------------------------------MachConstantBaseNode-------------------------- |
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388 // Machine node that represents the base address of the constant table. |
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389 class MachConstantBaseNode : public MachIdealNode { |
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390 public: |
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391 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). |
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392 |
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393 public: |
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394 MachConstantBaseNode() : MachIdealNode() { |
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395 init_class_id(Class_MachConstantBase); |
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396 } |
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397 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } |
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398 virtual uint ideal_reg() const { return Op_RegP; } |
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399 virtual uint oper_input_base() const { return 1; } |
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400 |
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401 virtual bool requires_postalloc_expand() const; |
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402 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
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403 |
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404 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; |
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405 virtual uint size(PhaseRegAlloc* ra_) const; |
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406 virtual bool pinned() const { return UseRDPCForConstantTableBase; } |
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407 |
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408 static const RegMask& static_out_RegMask() { return _out_RegMask; } |
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409 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } |
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410 |
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411 #ifndef PRODUCT |
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412 virtual const char* Name() const { return "MachConstantBaseNode"; } |
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413 virtual void format(PhaseRegAlloc*, outputStream* st) const; |
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414 #endif |
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415 }; |
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416 |
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417 //------------------------------MachConstantNode------------------------------- |
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418 // Machine node that holds a constant which is stored in the constant table. |
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419 class MachConstantNode : public MachTypeNode { |
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420 protected: |
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421 Compile::Constant _constant; // This node's constant. |
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422 |
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423 public: |
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424 MachConstantNode() : MachTypeNode() { |
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425 init_class_id(Class_MachConstant); |
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426 } |
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427 |
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428 virtual void eval_constant(Compile* C) { |
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429 #ifdef ASSERT |
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430 tty->print("missing MachConstantNode eval_constant function: "); |
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431 dump(); |
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432 #endif |
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433 ShouldNotCallThis(); |
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434 } |
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435 |
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436 virtual const RegMask &in_RegMask(uint idx) const { |
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437 if (idx == mach_constant_base_node_input()) |
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438 return MachConstantBaseNode::static_out_RegMask(); |
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439 return MachNode::in_RegMask(idx); |
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440 } |
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441 |
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442 // Input edge of MachConstantBaseNode. |
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443 virtual uint mach_constant_base_node_input() const { return req() - 1; } |
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444 |
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445 int constant_offset(); |
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446 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } |
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447 // Unchecked version to avoid assertions in debug output. |
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448 int constant_offset_unchecked() const; |
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449 }; |
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450 |
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451 //------------------------------MachUEPNode----------------------------------- |
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452 // Machine Unvalidated Entry Point Node |
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453 class MachUEPNode : public MachIdealNode { |
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454 public: |
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455 MachUEPNode( ) {} |
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456 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
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457 virtual uint size(PhaseRegAlloc *ra_) const; |
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458 |
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459 #ifndef PRODUCT |
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460 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } |
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461 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
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462 #endif |
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463 }; |
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464 |
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465 //------------------------------MachPrologNode-------------------------------- |
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466 // Machine function Prolog Node |
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467 class MachPrologNode : public MachIdealNode { |
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468 public: |
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469 MachPrologNode( ) {} |
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470 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
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471 virtual uint size(PhaseRegAlloc *ra_) const; |
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472 virtual int reloc() const; |
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473 |
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474 #ifndef PRODUCT |
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475 virtual const char *Name() const { return "Prolog"; } |
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476 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
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477 #endif |
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478 }; |
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479 |
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480 //------------------------------MachEpilogNode-------------------------------- |
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481 // Machine function Epilog Node |
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482 class MachEpilogNode : public MachIdealNode { |
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483 public: |
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484 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} |
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485 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
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486 virtual uint size(PhaseRegAlloc *ra_) const; |
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487 virtual int reloc() const; |
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488 virtual const Pipeline *pipeline() const; |
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489 |
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490 private: |
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491 bool _do_polling; |
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492 |
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493 public: |
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494 bool do_polling() const { return _do_polling; } |
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495 |
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496 // Offset of safepoint from the beginning of the node |
|
497 int safepoint_offset() const; |
|
498 |
|
499 #ifndef PRODUCT |
|
500 virtual const char *Name() const { return "Epilog"; } |
|
501 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
|
502 #endif |
|
503 }; |
|
504 |
|
505 //------------------------------MachNopNode----------------------------------- |
|
506 // Machine function Nop Node |
|
507 class MachNopNode : public MachIdealNode { |
|
508 private: |
|
509 int _count; |
|
510 public: |
|
511 MachNopNode( ) : _count(1) {} |
|
512 MachNopNode( int count ) : _count(count) {} |
|
513 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
|
514 virtual uint size(PhaseRegAlloc *ra_) const; |
|
515 |
|
516 virtual const class Type *bottom_type() const { return Type::CONTROL; } |
|
517 |
|
518 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp |
|
519 virtual const Pipeline *pipeline() const; |
|
520 #ifndef PRODUCT |
|
521 virtual const char *Name() const { return "Nop"; } |
|
522 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
|
523 virtual void dump_spec(outputStream *st) const { } // No per-operand info |
|
524 #endif |
|
525 }; |
|
526 |
|
527 //------------------------------MachSpillCopyNode------------------------------ |
|
528 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any |
|
529 // location (stack or register). |
|
530 class MachSpillCopyNode : public MachIdealNode { |
|
531 const RegMask *_in; // RegMask for input |
|
532 const RegMask *_out; // RegMask for output |
|
533 const Type *_type; |
|
534 public: |
|
535 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : |
|
536 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { |
|
537 init_class_id(Class_MachSpillCopy); |
|
538 init_flags(Flag_is_Copy); |
|
539 add_req(NULL); |
|
540 add_req(n); |
|
541 } |
|
542 virtual uint size_of() const { return sizeof(*this); } |
|
543 void set_out_RegMask(const RegMask &out) { _out = &out; } |
|
544 void set_in_RegMask(const RegMask &in) { _in = ∈ } |
|
545 virtual const RegMask &out_RegMask() const { return *_out; } |
|
546 virtual const RegMask &in_RegMask(uint) const { return *_in; } |
|
547 virtual const class Type *bottom_type() const { return _type; } |
|
548 virtual uint ideal_reg() const { return _type->ideal_reg(); } |
|
549 virtual uint oper_input_base() const { return 1; } |
|
550 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; |
|
551 |
|
552 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
|
553 virtual uint size(PhaseRegAlloc *ra_) const; |
|
554 |
|
555 #ifndef PRODUCT |
|
556 virtual const char *Name() const { return "MachSpillCopy"; } |
|
557 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
|
558 #endif |
|
559 }; |
|
560 |
|
561 //------------------------------MachBranchNode-------------------------------- |
|
562 // Abstract machine branch Node |
|
563 class MachBranchNode : public MachIdealNode { |
|
564 public: |
|
565 MachBranchNode() : MachIdealNode() { |
|
566 init_class_id(Class_MachBranch); |
|
567 } |
|
568 virtual void label_set(Label* label, uint block_num) = 0; |
|
569 virtual void save_label(Label** label, uint* block_num) = 0; |
|
570 |
|
571 // Support for short branches |
|
572 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
|
573 |
|
574 virtual bool pinned() const { return true; }; |
|
575 }; |
|
576 |
|
577 //------------------------------MachNullChkNode-------------------------------- |
|
578 // Machine-dependent null-pointer-check Node. Points a real MachNode that is |
|
579 // also some kind of memory op. Turns the indicated MachNode into a |
|
580 // conditional branch with good latency on the ptr-not-null path and awful |
|
581 // latency on the pointer-is-null path. |
|
582 |
|
583 class MachNullCheckNode : public MachBranchNode { |
|
584 public: |
|
585 const uint _vidx; // Index of memop being tested |
|
586 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
|
587 init_class_id(Class_MachNullCheck); |
|
588 add_req(ctrl); |
|
589 add_req(memop); |
|
590 } |
|
591 virtual uint size_of() const { return sizeof(*this); } |
|
592 |
|
593 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; |
|
594 virtual void label_set(Label* label, uint block_num); |
|
595 virtual void save_label(Label** label, uint* block_num); |
|
596 virtual void negate() { } |
|
597 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } |
|
598 virtual uint ideal_reg() const { return NotAMachineReg; } |
|
599 virtual const RegMask &in_RegMask(uint) const; |
|
600 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } |
|
601 #ifndef PRODUCT |
|
602 virtual const char *Name() const { return "NullCheck"; } |
|
603 virtual void format( PhaseRegAlloc *, outputStream *st ) const; |
|
604 #endif |
|
605 }; |
|
606 |
|
607 //------------------------------MachProjNode---------------------------------- |
|
608 // Machine-dependent Ideal projections (how is that for an oxymoron). Really |
|
609 // just MachNodes made by the Ideal world that replicate simple projections |
|
610 // but with machine-dependent input & output register masks. Generally |
|
611 // produced as part of calling conventions. Normally I make MachNodes as part |
|
612 // of the Matcher process, but the Matcher is ill suited to issues involving |
|
613 // frame handling, so frame handling is all done in the Ideal world with |
|
614 // occasional callbacks to the machine model for important info. |
|
615 class MachProjNode : public ProjNode { |
|
616 public: |
|
617 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
|
618 init_class_id(Class_MachProj); |
|
619 } |
|
620 RegMask _rout; |
|
621 const uint _ideal_reg; |
|
622 enum projType { |
|
623 unmatched_proj = 0, // Projs for Control, I/O, memory not matched |
|
624 fat_proj = 999 // Projs killing many regs, defined by _rout |
|
625 }; |
|
626 virtual int Opcode() const; |
|
627 virtual const Type *bottom_type() const; |
|
628 virtual const TypePtr *adr_type() const; |
|
629 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } |
|
630 virtual const RegMask &out_RegMask() const { return _rout; } |
|
631 virtual uint ideal_reg() const { return _ideal_reg; } |
|
632 // Need size_of() for virtual ProjNode::clone() |
|
633 virtual uint size_of() const { return sizeof(MachProjNode); } |
|
634 #ifndef PRODUCT |
|
635 virtual void dump_spec(outputStream *st) const; |
|
636 #endif |
|
637 }; |
|
638 |
|
639 //------------------------------MachIfNode------------------------------------- |
|
640 // Machine-specific versions of IfNodes |
|
641 class MachIfNode : public MachBranchNode { |
|
642 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
|
643 public: |
|
644 float _prob; // Probability branch goes either way |
|
645 float _fcnt; // Frequency counter |
|
646 MachIfNode() : MachBranchNode() { |
|
647 init_class_id(Class_MachIf); |
|
648 } |
|
649 // Negate conditional branches. |
|
650 virtual void negate() = 0; |
|
651 #ifndef PRODUCT |
|
652 virtual void dump_spec(outputStream *st) const; |
|
653 #endif |
|
654 }; |
|
655 |
|
656 //------------------------------MachGotoNode----------------------------------- |
|
657 // Machine-specific versions of GotoNodes |
|
658 class MachGotoNode : public MachBranchNode { |
|
659 public: |
|
660 MachGotoNode() : MachBranchNode() { |
|
661 init_class_id(Class_MachGoto); |
|
662 } |
|
663 }; |
|
664 |
|
665 //------------------------------MachFastLockNode------------------------------------- |
|
666 // Machine-specific versions of FastLockNodes |
|
667 class MachFastLockNode : public MachNode { |
|
668 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
|
669 public: |
|
670 BiasedLockingCounters* _counters; |
|
671 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks |
|
672 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks |
|
673 MachFastLockNode() : MachNode() {} |
|
674 }; |
|
675 |
|
676 //------------------------------MachReturnNode-------------------------------- |
|
677 // Machine-specific versions of subroutine returns |
|
678 class MachReturnNode : public MachNode { |
|
679 virtual uint size_of() const; // Size is bigger |
|
680 public: |
|
681 RegMask *_in_rms; // Input register masks, set during allocation |
|
682 ReallocMark _nesting; // assertion check for reallocations |
|
683 const TypePtr* _adr_type; // memory effects of call or return |
|
684 MachReturnNode() : MachNode() { |
|
685 init_class_id(Class_MachReturn); |
|
686 _adr_type = TypePtr::BOTTOM; // the default: all of memory |
|
687 } |
|
688 |
|
689 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } |
|
690 |
|
691 virtual const RegMask &in_RegMask(uint) const; |
|
692 virtual bool pinned() const { return true; }; |
|
693 virtual const TypePtr *adr_type() const; |
|
694 }; |
|
695 |
|
696 //------------------------------MachSafePointNode----------------------------- |
|
697 // Machine-specific versions of safepoints |
|
698 class MachSafePointNode : public MachReturnNode { |
|
699 public: |
|
700 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC |
|
701 JVMState* _jvms; // Pointer to list of JVM State Objects |
|
702 uint _jvmadj; // Extra delta to jvms indexes (mach. args) |
|
703 OopMap* oop_map() const { return _oop_map; } |
|
704 void set_oop_map(OopMap* om) { _oop_map = om; } |
|
705 |
|
706 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { |
|
707 init_class_id(Class_MachSafePoint); |
|
708 } |
|
709 |
|
710 virtual JVMState* jvms() const { return _jvms; } |
|
711 void set_jvms(JVMState* s) { |
|
712 _jvms = s; |
|
713 } |
|
714 virtual const Type *bottom_type() const; |
|
715 |
|
716 virtual const RegMask &in_RegMask(uint) const; |
|
717 |
|
718 // Functionality from old debug nodes |
|
719 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } |
|
720 Node *frameptr () const { return in(TypeFunc::FramePtr); } |
|
721 |
|
722 Node *local(const JVMState* jvms, uint idx) const { |
|
723 assert(verify_jvms(jvms), "jvms must match"); |
|
724 return in(_jvmadj + jvms->locoff() + idx); |
|
725 } |
|
726 Node *stack(const JVMState* jvms, uint idx) const { |
|
727 assert(verify_jvms(jvms), "jvms must match"); |
|
728 return in(_jvmadj + jvms->stkoff() + idx); |
|
729 } |
|
730 Node *monitor_obj(const JVMState* jvms, uint idx) const { |
|
731 assert(verify_jvms(jvms), "jvms must match"); |
|
732 return in(_jvmadj + jvms->monitor_obj_offset(idx)); |
|
733 } |
|
734 Node *monitor_box(const JVMState* jvms, uint idx) const { |
|
735 assert(verify_jvms(jvms), "jvms must match"); |
|
736 return in(_jvmadj + jvms->monitor_box_offset(idx)); |
|
737 } |
|
738 void set_local(const JVMState* jvms, uint idx, Node *c) { |
|
739 assert(verify_jvms(jvms), "jvms must match"); |
|
740 set_req(_jvmadj + jvms->locoff() + idx, c); |
|
741 } |
|
742 void set_stack(const JVMState* jvms, uint idx, Node *c) { |
|
743 assert(verify_jvms(jvms), "jvms must match"); |
|
744 set_req(_jvmadj + jvms->stkoff() + idx, c); |
|
745 } |
|
746 void set_monitor(const JVMState* jvms, uint idx, Node *c) { |
|
747 assert(verify_jvms(jvms), "jvms must match"); |
|
748 set_req(_jvmadj + jvms->monoff() + idx, c); |
|
749 } |
|
750 }; |
|
751 |
|
752 //------------------------------MachCallNode---------------------------------- |
|
753 // Machine-specific versions of subroutine calls |
|
754 class MachCallNode : public MachSafePointNode { |
|
755 protected: |
|
756 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash |
|
757 virtual uint cmp( const Node &n ) const; |
|
758 virtual uint size_of() const = 0; // Size is bigger |
|
759 public: |
|
760 const TypeFunc *_tf; // Function type |
|
761 address _entry_point; // Address of the method being called |
|
762 float _cnt; // Estimate of number of times called |
|
763 uint _argsize; // Size of argument block on stack |
|
764 |
|
765 const TypeFunc* tf() const { return _tf; } |
|
766 const address entry_point() const { return _entry_point; } |
|
767 const float cnt() const { return _cnt; } |
|
768 uint argsize() const { return _argsize; } |
|
769 |
|
770 void set_tf(const TypeFunc* tf) { _tf = tf; } |
|
771 void set_entry_point(address p) { _entry_point = p; } |
|
772 void set_cnt(float c) { _cnt = c; } |
|
773 void set_argsize(int s) { _argsize = s; } |
|
774 |
|
775 MachCallNode() : MachSafePointNode() { |
|
776 init_class_id(Class_MachCall); |
|
777 } |
|
778 |
|
779 virtual const Type *bottom_type() const; |
|
780 virtual bool pinned() const { return false; } |
|
781 virtual const Type *Value( PhaseTransform *phase ) const; |
|
782 virtual const RegMask &in_RegMask(uint) const; |
|
783 virtual int ret_addr_offset() { return 0; } |
|
784 |
|
785 bool returns_long() const { return tf()->return_type() == T_LONG; } |
|
786 bool return_value_is_used() const; |
|
787 #ifndef PRODUCT |
|
788 virtual void dump_spec(outputStream *st) const; |
|
789 #endif |
|
790 }; |
|
791 |
|
792 //------------------------------MachCallJavaNode------------------------------ |
|
793 // "Base" class for machine-specific versions of subroutine calls |
|
794 class MachCallJavaNode : public MachCallNode { |
|
795 protected: |
|
796 virtual uint cmp( const Node &n ) const; |
|
797 virtual uint size_of() const; // Size is bigger |
|
798 public: |
|
799 ciMethod* _method; // Method being direct called |
|
800 int _bci; // Byte Code index of call byte code |
|
801 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual |
|
802 bool _method_handle_invoke; // Tells if the call has to preserve SP |
|
803 MachCallJavaNode() : MachCallNode() { |
|
804 init_class_id(Class_MachCallJava); |
|
805 } |
|
806 |
|
807 virtual const RegMask &in_RegMask(uint) const; |
|
808 |
|
809 #ifndef PRODUCT |
|
810 virtual void dump_spec(outputStream *st) const; |
|
811 #endif |
|
812 }; |
|
813 |
|
814 //------------------------------MachCallStaticJavaNode------------------------ |
|
815 // Machine-specific versions of monomorphic subroutine calls |
|
816 class MachCallStaticJavaNode : public MachCallJavaNode { |
|
817 virtual uint cmp( const Node &n ) const; |
|
818 virtual uint size_of() const; // Size is bigger |
|
819 public: |
|
820 const char *_name; // Runtime wrapper name |
|
821 MachCallStaticJavaNode() : MachCallJavaNode() { |
|
822 init_class_id(Class_MachCallStaticJava); |
|
823 } |
|
824 |
|
825 // If this is an uncommon trap, return the request code, else zero. |
|
826 int uncommon_trap_request() const; |
|
827 |
|
828 virtual int ret_addr_offset(); |
|
829 #ifndef PRODUCT |
|
830 virtual void dump_spec(outputStream *st) const; |
|
831 void dump_trap_args(outputStream *st) const; |
|
832 #endif |
|
833 }; |
|
834 |
|
835 //------------------------------MachCallDynamicJavaNode------------------------ |
|
836 // Machine-specific versions of possibly megamorphic subroutine calls |
|
837 class MachCallDynamicJavaNode : public MachCallJavaNode { |
|
838 public: |
|
839 int _vtable_index; |
|
840 MachCallDynamicJavaNode() : MachCallJavaNode() { |
|
841 init_class_id(Class_MachCallDynamicJava); |
|
842 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized |
|
843 } |
|
844 virtual int ret_addr_offset(); |
|
845 #ifndef PRODUCT |
|
846 virtual void dump_spec(outputStream *st) const; |
|
847 #endif |
|
848 }; |
|
849 |
|
850 //------------------------------MachCallRuntimeNode---------------------------- |
|
851 // Machine-specific versions of subroutine calls |
|
852 class MachCallRuntimeNode : public MachCallNode { |
|
853 virtual uint cmp( const Node &n ) const; |
|
854 virtual uint size_of() const; // Size is bigger |
|
855 public: |
|
856 const char *_name; // Printable name, if _method is NULL |
|
857 MachCallRuntimeNode() : MachCallNode() { |
|
858 init_class_id(Class_MachCallRuntime); |
|
859 } |
|
860 virtual int ret_addr_offset(); |
|
861 #ifndef PRODUCT |
|
862 virtual void dump_spec(outputStream *st) const; |
|
863 #endif |
|
864 }; |
|
865 |
|
866 class MachCallLeafNode: public MachCallRuntimeNode { |
|
867 public: |
|
868 MachCallLeafNode() : MachCallRuntimeNode() { |
|
869 init_class_id(Class_MachCallLeaf); |
|
870 } |
|
871 }; |
|
872 |
|
873 //------------------------------MachHaltNode----------------------------------- |
|
874 // Machine-specific versions of halt nodes |
|
875 class MachHaltNode : public MachReturnNode { |
|
876 public: |
|
877 virtual JVMState* jvms() const; |
|
878 }; |
|
879 |
|
880 |
|
881 //------------------------------MachTempNode----------------------------------- |
|
882 // Node used by the adlc to construct inputs to represent temporary registers |
|
883 class MachTempNode : public MachNode { |
|
884 private: |
|
885 MachOper *_opnd_array[1]; |
|
886 |
|
887 public: |
|
888 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } |
|
889 virtual uint rule() const { return 9999999; } |
|
890 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} |
|
891 |
|
892 MachTempNode(MachOper* oper) { |
|
893 init_class_id(Class_MachTemp); |
|
894 _num_opnds = 1; |
|
895 _opnds = _opnd_array; |
|
896 add_req(NULL); |
|
897 _opnds[0] = oper; |
|
898 } |
|
899 virtual uint size_of() const { return sizeof(MachTempNode); } |
|
900 |
|
901 #ifndef PRODUCT |
|
902 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} |
|
903 virtual const char *Name() const { return "MachTemp";} |
|
904 #endif |
|
905 }; |
|
906 |
|
907 |
|
908 |
|
909 //------------------------------labelOper-------------------------------------- |
|
910 // Machine-independent version of label operand |
|
911 class labelOper : public MachOper { |
|
912 private: |
|
913 virtual uint num_edges() const { return 0; } |
|
914 public: |
|
915 // Supported for fixed size branches |
|
916 Label* _label; // Label for branch(es) |
|
917 |
|
918 uint _block_num; |
|
919 |
|
920 labelOper() : _block_num(0), _label(0) {} |
|
921 |
|
922 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} |
|
923 |
|
924 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} |
|
925 |
|
926 virtual MachOper *clone(Compile* C) const; |
|
927 |
|
928 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
|
929 |
|
930 virtual uint opcode() const; |
|
931 |
|
932 virtual uint hash() const; |
|
933 virtual uint cmp( const MachOper &oper ) const; |
|
934 #ifndef PRODUCT |
|
935 virtual const char *Name() const { return "Label";} |
|
936 |
|
937 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; |
|
938 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } |
|
939 #endif |
|
940 }; |
|
941 |
|
942 |
|
943 //------------------------------methodOper-------------------------------------- |
|
944 // Machine-independent version of method operand |
|
945 class methodOper : public MachOper { |
|
946 private: |
|
947 virtual uint num_edges() const { return 0; } |
|
948 public: |
|
949 intptr_t _method; // Address of method |
|
950 methodOper() : _method(0) {} |
|
951 methodOper(intptr_t method) : _method(method) {} |
|
952 |
|
953 virtual MachOper *clone(Compile* C) const; |
|
954 |
|
955 virtual intptr_t method() const { return _method; } |
|
956 |
|
957 virtual uint opcode() const; |
|
958 |
|
959 virtual uint hash() const; |
|
960 virtual uint cmp( const MachOper &oper ) const; |
|
961 #ifndef PRODUCT |
|
962 virtual const char *Name() const { return "Method";} |
|
963 |
|
964 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; |
|
965 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } |
|
966 #endif |
|
967 }; |
|
968 |
|
969 #endif // SHARE_VM_OPTO_MACHNODE_HPP |