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1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 * |
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23 */ |
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24 |
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25 #ifndef OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP |
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26 #define OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP |
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27 |
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28 #include "runtime/atomic.inline.hpp" |
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29 #include "runtime/orderAccess.hpp" |
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30 #include "runtime/os.hpp" |
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31 #include "vm_version_x86.hpp" |
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32 |
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33 // Implementation of class OrderAccess. |
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34 |
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35 inline void OrderAccess::loadload() { acquire(); } |
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36 inline void OrderAccess::storestore() { release(); } |
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37 inline void OrderAccess::loadstore() { acquire(); } |
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38 inline void OrderAccess::storeload() { fence(); } |
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39 |
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40 inline void OrderAccess::acquire() { |
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41 #ifndef AMD64 |
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42 __asm { |
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43 mov eax, dword ptr [esp]; |
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44 } |
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45 #endif // !AMD64 |
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46 } |
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47 |
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48 inline void OrderAccess::release() { |
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49 // A volatile store has release semantics. |
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50 volatile jint local_dummy = 0; |
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51 } |
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52 |
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53 inline void OrderAccess::fence() { |
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54 #ifdef AMD64 |
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55 StubRoutines_fence(); |
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56 #else |
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57 if (os::is_MP()) { |
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58 __asm { |
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59 lock add dword ptr [esp], 0; |
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60 } |
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61 } |
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62 #endif // AMD64 |
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63 } |
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64 |
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65 inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { return *p; } |
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66 inline jshort OrderAccess::load_acquire(volatile jshort* p) { return *p; } |
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67 inline jint OrderAccess::load_acquire(volatile jint* p) { return *p; } |
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68 inline jlong OrderAccess::load_acquire(volatile jlong* p) { return Atomic::load(p); } |
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69 inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { return *p; } |
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70 inline jushort OrderAccess::load_acquire(volatile jushort* p) { return *p; } |
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71 inline juint OrderAccess::load_acquire(volatile juint* p) { return *p; } |
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72 inline julong OrderAccess::load_acquire(volatile julong* p) { return Atomic::load((volatile jlong*)p); } |
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73 inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { return *p; } |
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74 inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { return jdouble_cast(Atomic::load((volatile jlong*)p)); } |
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75 |
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76 inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return *p; } |
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77 inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return *(void* volatile *)p; } |
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78 inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return *(void* const volatile *)p; } |
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79 |
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80 inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { *p = v; } |
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81 inline void OrderAccess::release_store(volatile jshort* p, jshort v) { *p = v; } |
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82 inline void OrderAccess::release_store(volatile jint* p, jint v) { *p = v; } |
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83 inline void OrderAccess::release_store(volatile jlong* p, jlong v) { Atomic::store(v, p); } |
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84 inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { *p = v; } |
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85 inline void OrderAccess::release_store(volatile jushort* p, jushort v) { *p = v; } |
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86 inline void OrderAccess::release_store(volatile juint* p, juint v) { *p = v; } |
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87 inline void OrderAccess::release_store(volatile julong* p, julong v) { Atomic::store((jlong)v, (volatile jlong*)p); } |
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88 inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { *p = v; } |
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89 inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { release_store((volatile jlong*)p, jlong_cast(v)); } |
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90 |
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91 inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { *p = v; } |
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92 inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { *(void* volatile *)p = v; } |
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93 |
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94 inline void OrderAccess::store_fence(jbyte* p, jbyte v) { |
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95 #ifdef AMD64 |
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96 *p = v; fence(); |
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97 #else |
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98 __asm { |
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99 mov edx, p; |
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100 mov al, v; |
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101 xchg al, byte ptr [edx]; |
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102 } |
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103 #endif // AMD64 |
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104 } |
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105 |
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106 inline void OrderAccess::store_fence(jshort* p, jshort v) { |
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107 #ifdef AMD64 |
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108 *p = v; fence(); |
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109 #else |
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110 __asm { |
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111 mov edx, p; |
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112 mov ax, v; |
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113 xchg ax, word ptr [edx]; |
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114 } |
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115 #endif // AMD64 |
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116 } |
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117 |
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118 inline void OrderAccess::store_fence(jint* p, jint v) { |
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119 #ifdef AMD64 |
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120 *p = v; fence(); |
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121 #else |
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122 __asm { |
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123 mov edx, p; |
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124 mov eax, v; |
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125 xchg eax, dword ptr [edx]; |
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126 } |
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127 #endif // AMD64 |
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128 } |
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129 |
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130 inline void OrderAccess::store_fence(jlong* p, jlong v) { *p = v; fence(); } |
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131 inline void OrderAccess::store_fence(jubyte* p, jubyte v) { store_fence((jbyte*)p, (jbyte)v); } |
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132 inline void OrderAccess::store_fence(jushort* p, jushort v) { store_fence((jshort*)p, (jshort)v); } |
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133 inline void OrderAccess::store_fence(juint* p, juint v) { store_fence((jint*)p, (jint)v); } |
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134 inline void OrderAccess::store_fence(julong* p, julong v) { store_fence((jlong*)p, (jlong)v); } |
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135 inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); } |
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136 inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; fence(); } |
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137 |
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138 inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { |
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139 #ifdef AMD64 |
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140 *p = v; fence(); |
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141 #else |
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142 store_fence((jint*)p, (jint)v); |
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143 #endif // AMD64 |
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144 } |
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145 |
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146 inline void OrderAccess::store_ptr_fence(void** p, void* v) { |
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147 #ifdef AMD64 |
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148 *p = v; fence(); |
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149 #else |
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150 store_fence((jint*)p, (jint)v); |
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151 #endif // AMD64 |
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152 } |
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153 |
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154 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile. |
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155 inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { |
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156 #ifdef AMD64 |
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157 *p = v; fence(); |
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158 #else |
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159 __asm { |
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160 mov edx, p; |
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161 mov al, v; |
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162 xchg al, byte ptr [edx]; |
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163 } |
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164 #endif // AMD64 |
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165 } |
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166 |
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167 inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { |
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168 #ifdef AMD64 |
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169 *p = v; fence(); |
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170 #else |
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171 __asm { |
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172 mov edx, p; |
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173 mov ax, v; |
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174 xchg ax, word ptr [edx]; |
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175 } |
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176 #endif // AMD64 |
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177 } |
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178 |
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179 inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { |
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180 #ifdef AMD64 |
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181 *p = v; fence(); |
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182 #else |
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183 __asm { |
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184 mov edx, p; |
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185 mov eax, v; |
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186 xchg eax, dword ptr [edx]; |
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187 } |
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188 #endif // AMD64 |
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189 } |
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190 |
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191 inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { release_store(p, v); fence(); } |
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192 |
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193 inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store_fence((volatile jbyte*)p, (jbyte)v); } |
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194 inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store_fence((volatile jshort*)p, (jshort)v); } |
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195 inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store_fence((volatile jint*)p, (jint)v); } |
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196 inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store_fence((volatile jlong*)p, (jlong)v); } |
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197 inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { *p = v; fence(); } |
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198 inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { release_store_fence((volatile jlong*)p, jlong_cast(v)); } |
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199 |
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200 inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { |
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201 #ifdef AMD64 |
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202 *p = v; fence(); |
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203 #else |
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204 release_store_fence((volatile jint*)p, (jint)v); |
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205 #endif // AMD64 |
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206 } |
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207 |
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208 inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { |
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209 #ifdef AMD64 |
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210 *(void* volatile *)p = v; fence(); |
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211 #else |
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212 release_store_fence((volatile jint*)p, (jint)v); |
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213 #endif // AMD64 |
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214 } |
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215 |
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216 #endif // OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP |