src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp

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1 /*
2 * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_sparc.inline.hpp"
39
40 #ifdef ASSERT
41 #define __ gen()->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen()->lir()->
44 #endif
45
46 void LIRItem::load_byte_item() {
47 // byte loads use same registers as other loads
48 load_item();
49 }
50
51
52 void LIRItem::load_nonconstant() {
53 LIR_Opr r = value()->operand();
54 if (_gen->can_inline_as_constant(value())) {
55 if (!r->is_constant()) {
56 r = LIR_OprFact::value_type(value()->type());
57 }
58 _result = r;
59 } else {
60 load_item();
61 }
62 }
63
64
65 //--------------------------------------------------------------
66 // LIRGenerator
67 //--------------------------------------------------------------
68
69 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
70 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
71 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
72 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); }
73
74 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
75 LIR_Opr opr;
76 switch (type->tag()) {
77 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
78 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
79 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
80 case floatTag: opr = FrameMap::F0_opr; break;
81 case doubleTag: opr = FrameMap::F0_double_opr; break;
82
83 case addressTag:
84 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
85 }
86
87 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
88 return opr;
89 }
90
91 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
92 LIR_Opr reg = new_register(type);
93 set_vreg_flag(reg, callee_saved);
94 return reg;
95 }
96
97
98 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
99 return new_register(T_INT);
100 }
101
102
103
104
105
106 //--------- loading items into registers --------------------------------
107
108 // SPARC cannot inline all constants
109 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
110 if (v->type()->as_IntConstant() != NULL) {
111 return v->type()->as_IntConstant()->value() == 0;
112 } else if (v->type()->as_LongConstant() != NULL) {
113 return v->type()->as_LongConstant()->value() == 0L;
114 } else if (v->type()->as_ObjectConstant() != NULL) {
115 return v->type()->as_ObjectConstant()->value()->is_null_object();
116 } else {
117 return false;
118 }
119 }
120
121
122 // only simm13 constants can be inlined
123 bool LIRGenerator:: can_inline_as_constant(Value i) const {
124 if (i->type()->as_IntConstant() != NULL) {
125 return Assembler::is_simm13(i->type()->as_IntConstant()->value());
126 } else {
127 return can_store_as_constant(i, as_BasicType(i->type()));
128 }
129 }
130
131
132 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
133 if (c->type() == T_INT) {
134 return Assembler::is_simm13(c->as_jint());
135 }
136 return false;
137 }
138
139
140 LIR_Opr LIRGenerator::safepoint_poll_register() {
141 return new_register(T_INT);
142 }
143
144
145
146 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
147 int shift, int disp, BasicType type) {
148 assert(base->is_register(), "must be");
149
150 // accumulate fixed displacements
151 if (index->is_constant()) {
152 disp += index->as_constant_ptr()->as_jint() << shift;
153 index = LIR_OprFact::illegalOpr;
154 }
155
156 if (index->is_register()) {
157 // apply the shift and accumulate the displacement
158 if (shift > 0) {
159 LIR_Opr tmp = new_pointer_register();
160 __ shift_left(index, shift, tmp);
161 index = tmp;
162 }
163 if (disp != 0) {
164 LIR_Opr tmp = new_pointer_register();
165 if (Assembler::is_simm13(disp)) {
166 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
167 index = tmp;
168 } else {
169 __ move(LIR_OprFact::intptrConst(disp), tmp);
170 __ add(tmp, index, tmp);
171 index = tmp;
172 }
173 disp = 0;
174 }
175 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
176 // index is illegal so replace it with the displacement loaded into a register
177 index = new_pointer_register();
178 __ move(LIR_OprFact::intptrConst(disp), index);
179 disp = 0;
180 }
181
182 // at this point we either have base + index or base + displacement
183 if (disp == 0) {
184 return new LIR_Address(base, index, type);
185 } else {
186 assert(Assembler::is_simm13(disp), "must be");
187 return new LIR_Address(base, disp, type);
188 }
189 }
190
191
192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
193 BasicType type, bool needs_card_mark) {
194 int elem_size = type2aelembytes(type);
195 int shift = exact_log2(elem_size);
196
197 LIR_Opr base_opr;
198 int offset = arrayOopDesc::base_offset_in_bytes(type);
199
200 if (index_opr->is_constant()) {
201 int i = index_opr->as_constant_ptr()->as_jint();
202 int array_offset = i * elem_size;
203 if (Assembler::is_simm13(array_offset + offset)) {
204 base_opr = array_opr;
205 offset = array_offset + offset;
206 } else {
207 base_opr = new_pointer_register();
208 if (Assembler::is_simm13(array_offset)) {
209 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
210 } else {
211 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
212 __ add(base_opr, array_opr, base_opr);
213 }
214 }
215 } else {
216 #ifdef _LP64
217 if (index_opr->type() == T_INT) {
218 LIR_Opr tmp = new_register(T_LONG);
219 __ convert(Bytecodes::_i2l, index_opr, tmp);
220 index_opr = tmp;
221 }
222 #endif
223
224 base_opr = new_pointer_register();
225 assert (index_opr->is_register(), "Must be register");
226 if (shift > 0) {
227 __ shift_left(index_opr, shift, base_opr);
228 __ add(base_opr, array_opr, base_opr);
229 } else {
230 __ add(index_opr, array_opr, base_opr);
231 }
232 }
233 if (needs_card_mark) {
234 LIR_Opr ptr = new_pointer_register();
235 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
236 return new LIR_Address(ptr, type);
237 } else {
238 return new LIR_Address(base_opr, offset, type);
239 }
240 }
241
242 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
243 LIR_Opr r;
244 if (type == T_LONG) {
245 r = LIR_OprFact::longConst(x);
246 } else if (type == T_INT) {
247 r = LIR_OprFact::intConst(x);
248 } else {
249 ShouldNotReachHere();
250 }
251 if (!Assembler::is_simm13(x)) {
252 LIR_Opr tmp = new_register(type);
253 __ move(r, tmp);
254 return tmp;
255 }
256 return r;
257 }
258
259 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
260 LIR_Opr pointer = new_pointer_register();
261 __ move(LIR_OprFact::intptrConst(counter), pointer);
262 LIR_Address* addr = new LIR_Address(pointer, type);
263 increment_counter(addr, step);
264 }
265
266 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
267 LIR_Opr temp = new_register(addr->type());
268 __ move(addr, temp);
269 __ add(temp, load_immediate(step, addr->type()), temp);
270 __ move(temp, addr);
271 }
272
273 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
274 LIR_Opr o7opr = FrameMap::O7_opr;
275 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
276 __ cmp(condition, o7opr, c);
277 }
278
279
280 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
281 LIR_Opr o7opr = FrameMap::O7_opr;
282 __ load(new LIR_Address(base, disp, type), o7opr, info);
283 __ cmp(condition, reg, o7opr);
284 }
285
286
287 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
288 LIR_Opr o7opr = FrameMap::O7_opr;
289 __ load(new LIR_Address(base, disp, type), o7opr, info);
290 __ cmp(condition, reg, o7opr);
291 }
292
293
294 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
295 assert(left != result, "should be different registers");
296 if (is_power_of_2(c + 1)) {
297 __ shift_left(left, log2_intptr(c + 1), result);
298 __ sub(result, left, result);
299 return true;
300 } else if (is_power_of_2(c - 1)) {
301 __ shift_left(left, log2_intptr(c - 1), result);
302 __ add(result, left, result);
303 return true;
304 }
305 return false;
306 }
307
308
309 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
310 BasicType t = item->type();
311 LIR_Opr sp_opr = FrameMap::SP_opr;
312 if ((t == T_LONG || t == T_DOUBLE) &&
313 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
314 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
315 } else {
316 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
317 }
318 }
319
320 //----------------------------------------------------------------------
321 // visitor functions
322 //----------------------------------------------------------------------
323
324
325 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
326 assert(x->is_pinned(),"");
327 bool needs_range_check = x->compute_needs_range_check();
328 bool use_length = x->length() != NULL;
329 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
330 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
331 !get_jobject_constant(x->value())->is_null_object() ||
332 x->should_profile());
333
334 LIRItem array(x->array(), this);
335 LIRItem index(x->index(), this);
336 LIRItem value(x->value(), this);
337 LIRItem length(this);
338
339 array.load_item();
340 index.load_nonconstant();
341
342 if (use_length && needs_range_check) {
343 length.set_instruction(x->length());
344 length.load_item();
345 }
346 if (needs_store_check) {
347 value.load_item();
348 } else {
349 value.load_for_store(x->elt_type());
350 }
351
352 set_no_result(x);
353
354 // the CodeEmitInfo must be duplicated for each different
355 // LIR-instruction because spilling can occur anywhere between two
356 // instructions and so the debug information must be different
357 CodeEmitInfo* range_check_info = state_for(x);
358 CodeEmitInfo* null_check_info = NULL;
359 if (x->needs_null_check()) {
360 null_check_info = new CodeEmitInfo(range_check_info);
361 }
362
363 // emit array address setup early so it schedules better
364 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
365
366 if (GenerateRangeChecks && needs_range_check) {
367 if (use_length) {
368 __ cmp(lir_cond_belowEqual, length.result(), index.result());
369 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
370 } else {
371 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
372 // range_check also does the null check
373 null_check_info = NULL;
374 }
375 }
376
377 if (GenerateArrayStoreCheck && needs_store_check) {
378 LIR_Opr tmp1 = FrameMap::G1_opr;
379 LIR_Opr tmp2 = FrameMap::G3_opr;
380 LIR_Opr tmp3 = FrameMap::G5_opr;
381
382 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
383 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
384 }
385
386 if (obj_store) {
387 // Needs GC write barriers.
388 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
389 true /* do_load */, false /* patch */, NULL);
390 }
391 __ move(value.result(), array_addr, null_check_info);
392 if (obj_store) {
393 // Precise card mark
394 post_barrier(LIR_OprFact::address(array_addr), value.result());
395 }
396 }
397
398
399 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
400 assert(x->is_pinned(),"");
401 LIRItem obj(x->obj(), this);
402 obj.load_item();
403
404 set_no_result(x);
405
406 LIR_Opr lock = FrameMap::G1_opr;
407 LIR_Opr scratch = FrameMap::G3_opr;
408 LIR_Opr hdr = FrameMap::G4_opr;
409
410 CodeEmitInfo* info_for_exception = NULL;
411 if (x->needs_null_check()) {
412 info_for_exception = state_for(x);
413 }
414
415 // this CodeEmitInfo must not have the xhandlers because here the
416 // object is already locked (xhandlers expects object to be unlocked)
417 CodeEmitInfo* info = state_for(x, x->state(), true);
418 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
419 }
420
421
422 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
423 assert(x->is_pinned(),"");
424 LIRItem obj(x->obj(), this);
425 obj.dont_load_item();
426
427 set_no_result(x);
428 LIR_Opr lock = FrameMap::G1_opr;
429 LIR_Opr hdr = FrameMap::G3_opr;
430 LIR_Opr obj_temp = FrameMap::G4_opr;
431 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
432 }
433
434
435 // _ineg, _lneg, _fneg, _dneg
436 void LIRGenerator::do_NegateOp(NegateOp* x) {
437 LIRItem value(x->x(), this);
438 value.load_item();
439 LIR_Opr reg = rlock_result(x);
440 __ negate(value.result(), reg);
441 }
442
443
444
445 // for _fadd, _fmul, _fsub, _fdiv, _frem
446 // _dadd, _dmul, _dsub, _ddiv, _drem
447 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
448 switch (x->op()) {
449 case Bytecodes::_fadd:
450 case Bytecodes::_fmul:
451 case Bytecodes::_fsub:
452 case Bytecodes::_fdiv:
453 case Bytecodes::_dadd:
454 case Bytecodes::_dmul:
455 case Bytecodes::_dsub:
456 case Bytecodes::_ddiv: {
457 LIRItem left(x->x(), this);
458 LIRItem right(x->y(), this);
459 left.load_item();
460 right.load_item();
461 rlock_result(x);
462 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
463 }
464 break;
465
466 case Bytecodes::_frem:
467 case Bytecodes::_drem: {
468 address entry;
469 switch (x->op()) {
470 case Bytecodes::_frem:
471 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
472 break;
473 case Bytecodes::_drem:
474 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
475 break;
476 default:
477 ShouldNotReachHere();
478 }
479 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
480 set_result(x, result);
481 }
482 break;
483
484 default: ShouldNotReachHere();
485 }
486 }
487
488
489 // for _ladd, _lmul, _lsub, _ldiv, _lrem
490 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
491 switch (x->op()) {
492 case Bytecodes::_lrem:
493 case Bytecodes::_lmul:
494 case Bytecodes::_ldiv: {
495
496 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
497 LIRItem right(x->y(), this);
498 right.load_item();
499
500 CodeEmitInfo* info = state_for(x);
501 LIR_Opr item = right.result();
502 assert(item->is_register(), "must be");
503 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
504 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
505 }
506
507 address entry;
508 switch (x->op()) {
509 case Bytecodes::_lrem:
510 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
511 break; // check if dividend is 0 is done elsewhere
512 case Bytecodes::_ldiv:
513 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
514 break; // check if dividend is 0 is done elsewhere
515 case Bytecodes::_lmul:
516 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
517 break;
518 default:
519 ShouldNotReachHere();
520 }
521
522 // order of arguments to runtime call is reversed.
523 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
524 set_result(x, result);
525 break;
526 }
527 case Bytecodes::_ladd:
528 case Bytecodes::_lsub: {
529 LIRItem left(x->x(), this);
530 LIRItem right(x->y(), this);
531 left.load_item();
532 right.load_item();
533 rlock_result(x);
534
535 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
536 break;
537 }
538 default: ShouldNotReachHere();
539 }
540 }
541
542
543 // Returns if item is an int constant that can be represented by a simm13
544 static bool is_simm13(LIR_Opr item) {
545 if (item->is_constant() && item->type() == T_INT) {
546 return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
547 } else {
548 return false;
549 }
550 }
551
552
553 // for: _iadd, _imul, _isub, _idiv, _irem
554 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
555 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
556 LIRItem left(x->x(), this);
557 LIRItem right(x->y(), this);
558 // missing test if instr is commutative and if we should swap
559 right.load_nonconstant();
560 assert(right.is_constant() || right.is_register(), "wrong state of right");
561 left.load_item();
562 rlock_result(x);
563 if (is_div_rem) {
564 CodeEmitInfo* info = state_for(x);
565 LIR_Opr tmp = FrameMap::G1_opr;
566 if (x->op() == Bytecodes::_irem) {
567 __ irem(left.result(), right.result(), x->operand(), tmp, info);
568 } else if (x->op() == Bytecodes::_idiv) {
569 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
570 }
571 } else {
572 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
573 }
574 }
575
576
577 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
578 ValueTag tag = x->type()->tag();
579 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
580 switch (tag) {
581 case floatTag:
582 case doubleTag: do_ArithmeticOp_FPU(x); return;
583 case longTag: do_ArithmeticOp_Long(x); return;
584 case intTag: do_ArithmeticOp_Int(x); return;
585 }
586 ShouldNotReachHere();
587 }
588
589
590 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
591 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
592 LIRItem value(x->x(), this);
593 LIRItem count(x->y(), this);
594 // Long shift destroys count register
595 if (value.type()->is_long()) {
596 count.set_destroys_register();
597 }
598 value.load_item();
599 // the old backend doesn't support this
600 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
601 jint c = count.get_jint_constant() & 0x1f;
602 assert(c >= 0 && c < 32, "should be small");
603 count.dont_load_item();
604 } else {
605 count.load_item();
606 }
607 LIR_Opr reg = rlock_result(x);
608 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
609 }
610
611
612 // _iand, _land, _ior, _lor, _ixor, _lxor
613 void LIRGenerator::do_LogicOp(LogicOp* x) {
614 LIRItem left(x->x(), this);
615 LIRItem right(x->y(), this);
616
617 left.load_item();
618 right.load_nonconstant();
619 LIR_Opr reg = rlock_result(x);
620
621 logic_op(x->op(), reg, left.result(), right.result());
622 }
623
624
625
626 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
627 void LIRGenerator::do_CompareOp(CompareOp* x) {
628 LIRItem left(x->x(), this);
629 LIRItem right(x->y(), this);
630 left.load_item();
631 right.load_item();
632 LIR_Opr reg = rlock_result(x);
633 if (x->x()->type()->is_float_kind()) {
634 Bytecodes::Code code = x->op();
635 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
636 } else if (x->x()->type()->tag() == longTag) {
637 __ lcmp2int(left.result(), right.result(), reg);
638 } else {
639 Unimplemented();
640 }
641 }
642
643
644 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
645 assert(x->number_of_arguments() == 4, "wrong type");
646 LIRItem obj (x->argument_at(0), this); // object
647 LIRItem offset(x->argument_at(1), this); // offset of field
648 LIRItem cmp (x->argument_at(2), this); // value to compare with field
649 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
650
651 // Use temps to avoid kills
652 LIR_Opr t1 = FrameMap::G1_opr;
653 LIR_Opr t2 = FrameMap::G3_opr;
654 LIR_Opr addr = new_pointer_register();
655
656 // get address of field
657 obj.load_item();
658 offset.load_item();
659 cmp.load_item();
660 val.load_item();
661
662 __ add(obj.result(), offset.result(), addr);
663
664 if (type == objectType) { // Write-barrier needed for Object fields.
665 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
666 true /* do_load */, false /* patch */, NULL);
667 }
668
669 if (type == objectType)
670 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
671 else if (type == intType)
672 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
673 else if (type == longType)
674 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
675 else {
676 ShouldNotReachHere();
677 }
678 // generate conditional move of boolean result
679 LIR_Opr result = rlock_result(x);
680 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
681 result, as_BasicType(type));
682 if (type == objectType) { // Write-barrier needed for Object fields.
683 // Precise card mark since could either be object or array
684 post_barrier(addr, val.result());
685 }
686 }
687
688
689 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
690 switch (x->id()) {
691 case vmIntrinsics::_dabs:
692 case vmIntrinsics::_dsqrt: {
693 assert(x->number_of_arguments() == 1, "wrong type");
694 LIRItem value(x->argument_at(0), this);
695 value.load_item();
696 LIR_Opr dst = rlock_result(x);
697
698 switch (x->id()) {
699 case vmIntrinsics::_dsqrt: {
700 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
701 break;
702 }
703 case vmIntrinsics::_dabs: {
704 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
705 break;
706 }
707 }
708 break;
709 }
710 case vmIntrinsics::_dlog10: // fall through
711 case vmIntrinsics::_dlog: // fall through
712 case vmIntrinsics::_dsin: // fall through
713 case vmIntrinsics::_dtan: // fall through
714 case vmIntrinsics::_dcos: // fall through
715 case vmIntrinsics::_dexp: {
716 assert(x->number_of_arguments() == 1, "wrong type");
717
718 address runtime_entry = NULL;
719 switch (x->id()) {
720 case vmIntrinsics::_dsin:
721 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
722 break;
723 case vmIntrinsics::_dcos:
724 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
725 break;
726 case vmIntrinsics::_dtan:
727 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
728 break;
729 case vmIntrinsics::_dlog:
730 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
731 break;
732 case vmIntrinsics::_dlog10:
733 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
734 break;
735 case vmIntrinsics::_dexp:
736 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
737 break;
738 default:
739 ShouldNotReachHere();
740 }
741
742 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
743 set_result(x, result);
744 break;
745 }
746 case vmIntrinsics::_dpow: {
747 assert(x->number_of_arguments() == 2, "wrong type");
748 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
749 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
750 set_result(x, result);
751 break;
752 }
753 }
754 }
755
756
757 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
758 assert(x->number_of_arguments() == 5, "wrong type");
759
760 // Make all state_for calls early since they can emit code
761 CodeEmitInfo* info = state_for(x, x->state());
762
763 // Note: spill caller save before setting the item
764 LIRItem src (x->argument_at(0), this);
765 LIRItem src_pos (x->argument_at(1), this);
766 LIRItem dst (x->argument_at(2), this);
767 LIRItem dst_pos (x->argument_at(3), this);
768 LIRItem length (x->argument_at(4), this);
769 // load all values in callee_save_registers, as this makes the
770 // parameter passing to the fast case simpler
771 src.load_item_force (rlock_callee_saved(T_OBJECT));
772 src_pos.load_item_force (rlock_callee_saved(T_INT));
773 dst.load_item_force (rlock_callee_saved(T_OBJECT));
774 dst_pos.load_item_force (rlock_callee_saved(T_INT));
775 length.load_item_force (rlock_callee_saved(T_INT));
776
777 int flags;
778 ciArrayKlass* expected_type;
779 arraycopy_helper(x, &flags, &expected_type);
780
781 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
782 length.result(), rlock_callee_saved(T_INT),
783 expected_type, flags, info);
784 set_no_result(x);
785 }
786
787 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
788 fatal("CRC32 intrinsic is not implemented on this platform");
789 }
790
791 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
792 // _i2b, _i2c, _i2s
793 void LIRGenerator::do_Convert(Convert* x) {
794
795 switch (x->op()) {
796 case Bytecodes::_f2l:
797 case Bytecodes::_d2l:
798 case Bytecodes::_d2i:
799 case Bytecodes::_l2f:
800 case Bytecodes::_l2d: {
801
802 address entry;
803 switch (x->op()) {
804 case Bytecodes::_l2f:
805 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
806 break;
807 case Bytecodes::_l2d:
808 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
809 break;
810 case Bytecodes::_f2l:
811 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
812 break;
813 case Bytecodes::_d2l:
814 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
815 break;
816 case Bytecodes::_d2i:
817 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
818 break;
819 default:
820 ShouldNotReachHere();
821 }
822 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
823 set_result(x, result);
824 break;
825 }
826
827 case Bytecodes::_i2f:
828 case Bytecodes::_i2d: {
829 LIRItem value(x->value(), this);
830
831 LIR_Opr reg = rlock_result(x);
832 // To convert an int to double, we need to load the 32-bit int
833 // from memory into a single precision floating point register
834 // (even numbered). Then the sparc fitod instruction takes care
835 // of the conversion. This is a bit ugly, but is the best way to
836 // get the int value in a single precision floating point register
837 value.load_item();
838 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
839 __ convert(x->op(), tmp, reg);
840 break;
841 }
842 break;
843
844 case Bytecodes::_i2l:
845 case Bytecodes::_i2b:
846 case Bytecodes::_i2c:
847 case Bytecodes::_i2s:
848 case Bytecodes::_l2i:
849 case Bytecodes::_f2d:
850 case Bytecodes::_d2f: { // inline code
851 LIRItem value(x->value(), this);
852
853 value.load_item();
854 LIR_Opr reg = rlock_result(x);
855 __ convert(x->op(), value.result(), reg, false);
856 }
857 break;
858
859 case Bytecodes::_f2i: {
860 LIRItem value (x->value(), this);
861 value.set_destroys_register();
862 value.load_item();
863 LIR_Opr reg = rlock_result(x);
864 set_vreg_flag(reg, must_start_in_memory);
865 __ convert(x->op(), value.result(), reg, false);
866 }
867 break;
868
869 default: ShouldNotReachHere();
870 }
871 }
872
873
874 void LIRGenerator::do_NewInstance(NewInstance* x) {
875 // This instruction can be deoptimized in the slow path : use
876 // O0 as result register.
877 const LIR_Opr reg = result_register_for(x->type());
878 #ifndef PRODUCT
879 if (PrintNotLoaded && !x->klass()->is_loaded()) {
880 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
881 }
882 #endif
883 CodeEmitInfo* info = state_for(x, x->state());
884 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
885 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
886 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
887 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
888 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
889 new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
890 LIR_Opr result = rlock_result(x);
891 __ move(reg, result);
892 }
893
894
895 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
896 // Evaluate state_for early since it may emit code
897 CodeEmitInfo* info = state_for(x, x->state());
898
899 LIRItem length(x->length(), this);
900 length.load_item();
901
902 LIR_Opr reg = result_register_for(x->type());
903 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
904 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
905 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
906 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
907 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
908 LIR_Opr len = length.result();
909 BasicType elem_type = x->elt_type();
910
911 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
912
913 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
914 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
915
916 LIR_Opr result = rlock_result(x);
917 __ move(reg, result);
918 }
919
920
921 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
922 // Evaluate state_for early since it may emit code.
923 CodeEmitInfo* info = state_for(x, x->state());
924 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
925 // and therefore provide the state before the parameters have been consumed
926 CodeEmitInfo* patching_info = NULL;
927 if (!x->klass()->is_loaded() || PatchALot) {
928 patching_info = state_for(x, x->state_before());
929 }
930
931 LIRItem length(x->length(), this);
932 length.load_item();
933
934 const LIR_Opr reg = result_register_for(x->type());
935 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
936 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
937 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
938 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
939 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
940 LIR_Opr len = length.result();
941
942 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
943 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
944 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
945 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
946 }
947 klass2reg_with_patching(klass_reg, obj, patching_info);
948 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
949
950 LIR_Opr result = rlock_result(x);
951 __ move(reg, result);
952 }
953
954
955 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
956 Values* dims = x->dims();
957 int i = dims->length();
958 LIRItemList* items = new LIRItemList(dims->length(), NULL);
959 while (i-- > 0) {
960 LIRItem* size = new LIRItem(dims->at(i), this);
961 items->at_put(i, size);
962 }
963
964 // Evaluate state_for early since it may emit code.
965 CodeEmitInfo* patching_info = NULL;
966 if (!x->klass()->is_loaded() || PatchALot) {
967 patching_info = state_for(x, x->state_before());
968
969 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
970 // clone all handlers (NOTE: Usually this is handled transparently
971 // by the CodeEmitInfo cloning logic in CodeStub constructors but
972 // is done explicitly here because a stub isn't being used).
973 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
974 }
975 CodeEmitInfo* info = state_for(x, x->state());
976
977 i = dims->length();
978 while (i-- > 0) {
979 LIRItem* size = items->at(i);
980 size->load_item();
981 store_stack_parameter (size->result(),
982 in_ByteSize(STACK_BIAS +
983 frame::memory_parameter_word_sp_offset * wordSize +
984 i * sizeof(jint)));
985 }
986
987 // This instruction can be deoptimized in the slow path : use
988 // O0 as result register.
989 const LIR_Opr klass_reg = FrameMap::O0_metadata_opr;
990 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
991 LIR_Opr rank = FrameMap::O1_opr;
992 __ move(LIR_OprFact::intConst(x->rank()), rank);
993 LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
994 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
995 __ add(FrameMap::SP_opr,
996 LIR_OprFact::intptrConst(offset_from_sp),
997 varargs);
998 LIR_OprList* args = new LIR_OprList(3);
999 args->append(klass_reg);
1000 args->append(rank);
1001 args->append(varargs);
1002 const LIR_Opr reg = result_register_for(x->type());
1003 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1004 LIR_OprFact::illegalOpr,
1005 reg, args, info);
1006
1007 LIR_Opr result = rlock_result(x);
1008 __ move(reg, result);
1009 }
1010
1011
1012 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1013 }
1014
1015
1016 void LIRGenerator::do_CheckCast(CheckCast* x) {
1017 LIRItem obj(x->obj(), this);
1018 CodeEmitInfo* patching_info = NULL;
1019 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1020 // must do this before locking the destination register as an oop register,
1021 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
1022 patching_info = state_for(x, x->state_before());
1023 }
1024 obj.load_item();
1025 LIR_Opr out_reg = rlock_result(x);
1026 CodeStub* stub;
1027 CodeEmitInfo* info_for_exception = state_for(x);
1028
1029 if (x->is_incompatible_class_change_check()) {
1030 assert(patching_info == NULL, "can't patch this");
1031 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1032 } else {
1033 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1034 }
1035 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1036 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1037 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1038 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1039 x->direct_compare(), info_for_exception, patching_info, stub,
1040 x->profiled_method(), x->profiled_bci());
1041 }
1042
1043
1044 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1045 LIRItem obj(x->obj(), this);
1046 CodeEmitInfo* patching_info = NULL;
1047 if (!x->klass()->is_loaded() || PatchALot) {
1048 patching_info = state_for(x, x->state_before());
1049 }
1050 // ensure the result register is not the input register because the result is initialized before the patching safepoint
1051 obj.load_item();
1052 LIR_Opr out_reg = rlock_result(x);
1053 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1054 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1055 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1056 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1057 x->direct_compare(), patching_info,
1058 x->profiled_method(), x->profiled_bci());
1059 }
1060
1061
1062 void LIRGenerator::do_If(If* x) {
1063 assert(x->number_of_sux() == 2, "inconsistency");
1064 ValueTag tag = x->x()->type()->tag();
1065 LIRItem xitem(x->x(), this);
1066 LIRItem yitem(x->y(), this);
1067 LIRItem* xin = &xitem;
1068 LIRItem* yin = &yitem;
1069 If::Condition cond = x->cond();
1070
1071 if (tag == longTag) {
1072 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1073 // mirror for other conditions
1074 if (cond == If::gtr || cond == If::leq) {
1075 // swap inputs
1076 cond = Instruction::mirror(cond);
1077 xin = &yitem;
1078 yin = &xitem;
1079 }
1080 xin->set_destroys_register();
1081 }
1082
1083 LIR_Opr left = LIR_OprFact::illegalOpr;
1084 LIR_Opr right = LIR_OprFact::illegalOpr;
1085
1086 xin->load_item();
1087 left = xin->result();
1088
1089 if (is_simm13(yin->result())) {
1090 // inline int constants which are small enough to be immediate operands
1091 right = LIR_OprFact::value_type(yin->value()->type());
1092 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1093 (cond == If::eql || cond == If::neq)) {
1094 // inline long zero
1095 right = LIR_OprFact::value_type(yin->value()->type());
1096 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1097 right = LIR_OprFact::value_type(yin->value()->type());
1098 } else {
1099 yin->load_item();
1100 right = yin->result();
1101 }
1102 set_no_result(x);
1103
1104 // add safepoint before generating condition code so it can be recomputed
1105 if (x->is_safepoint()) {
1106 // increment backedge counter if needed
1107 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1108 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
1109 }
1110
1111 __ cmp(lir_cond(cond), left, right);
1112 // Generate branch profiling. Profiling code doesn't kill flags.
1113 profile_branch(x, cond);
1114 move_to_phi(x->state());
1115 if (x->x()->type()->is_float_kind()) {
1116 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1117 } else {
1118 __ branch(lir_cond(cond), right->type(), x->tsux());
1119 }
1120 assert(x->default_sux() == x->fsux(), "wrong destination above");
1121 __ jump(x->default_sux());
1122 }
1123
1124
1125 LIR_Opr LIRGenerator::getThreadPointer() {
1126 return FrameMap::as_pointer_opr(G2);
1127 }
1128
1129
1130 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1131 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
1132 LIR_OprList* args = new LIR_OprList(1);
1133 args->append(FrameMap::O0_opr);
1134 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1135 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
1136 }
1137
1138
1139 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1140 CodeEmitInfo* info) {
1141 #ifdef _LP64
1142 __ store(value, address, info);
1143 #else
1144 __ volatile_store_mem_reg(value, address, info);
1145 #endif
1146 }
1147
1148 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1149 CodeEmitInfo* info) {
1150 #ifdef _LP64
1151 __ load(address, result, info);
1152 #else
1153 __ volatile_load_mem_reg(address, result, info);
1154 #endif
1155 }
1156
1157
1158 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1159 BasicType type, bool is_volatile) {
1160 LIR_Opr base_op = src;
1161 LIR_Opr index_op = offset;
1162
1163 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1164 #ifndef _LP64
1165 if (is_volatile && type == T_LONG) {
1166 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1167 } else
1168 #endif
1169 {
1170 if (type == T_BOOLEAN) {
1171 type = T_BYTE;
1172 }
1173 LIR_Address* addr;
1174 if (type == T_ARRAY || type == T_OBJECT) {
1175 LIR_Opr tmp = new_pointer_register();
1176 __ add(base_op, index_op, tmp);
1177 addr = new LIR_Address(tmp, type);
1178 } else {
1179 addr = new LIR_Address(base_op, index_op, type);
1180 }
1181
1182 if (is_obj) {
1183 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1184 true /* do_load */, false /* patch */, NULL);
1185 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1186 }
1187 __ move(data, addr);
1188 if (is_obj) {
1189 // This address is precise
1190 post_barrier(LIR_OprFact::address(addr), data);
1191 }
1192 }
1193 }
1194
1195
1196 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1197 BasicType type, bool is_volatile) {
1198 #ifndef _LP64
1199 if (is_volatile && type == T_LONG) {
1200 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1201 } else
1202 #endif
1203 {
1204 LIR_Address* addr = new LIR_Address(src, offset, type);
1205 __ load(addr, dst);
1206 }
1207 }
1208
1209 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1210 BasicType type = x->basic_type();
1211 LIRItem src(x->object(), this);
1212 LIRItem off(x->offset(), this);
1213 LIRItem value(x->value(), this);
1214
1215 src.load_item();
1216 value.load_item();
1217 off.load_nonconstant();
1218
1219 LIR_Opr dst = rlock_result(x, type);
1220 LIR_Opr data = value.result();
1221 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1222 LIR_Opr offset = off.result();
1223
1224 // Because we want a 2-arg form of xchg
1225 __ move(data, dst);
1226
1227 assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
1228 LIR_Address* addr;
1229 if (offset->is_constant()) {
1230
1231 #ifdef _LP64
1232 jlong l = offset->as_jlong();
1233 assert((jlong)((jint)l) == l, "offset too large for constant");
1234 jint c = (jint)l;
1235 #else
1236 jint c = offset->as_jint();
1237 #endif
1238 addr = new LIR_Address(src.result(), c, type);
1239 } else {
1240 addr = new LIR_Address(src.result(), offset, type);
1241 }
1242
1243 LIR_Opr tmp = LIR_OprFact::illegalOpr;
1244 LIR_Opr ptr = LIR_OprFact::illegalOpr;
1245
1246 if (is_obj) {
1247 // Do the pre-write barrier, if any.
1248 // barriers on sparc don't work with a base + index address
1249 tmp = FrameMap::G3_opr;
1250 ptr = new_pointer_register();
1251 __ add(src.result(), off.result(), ptr);
1252 pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
1253 true /* do_load */, false /* patch */, NULL);
1254 }
1255 __ xchg(LIR_OprFact::address(addr), dst, dst, tmp);
1256 if (is_obj) {
1257 // Seems to be a precise address
1258 post_barrier(ptr, data);
1259 }
1260 }

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