4767 emit_int8(0x13); |
4767 emit_int8(0x13); |
4768 emit_operand(dst, src); |
4768 emit_operand(dst, src); |
4769 } |
4769 } |
4770 |
4770 |
4771 void Assembler::adcq(Register dst, Register src) { |
4771 void Assembler::adcq(Register dst, Register src) { |
4772 (int) prefixq_and_encode(dst->encoding(), src->encoding()); |
4772 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
4773 emit_arith(0x13, 0xC0, dst, src); |
4773 emit_arith(0x13, 0xC0, dst, src); |
4774 } |
4774 } |
4775 |
4775 |
4776 void Assembler::addq(Address dst, int32_t imm32) { |
4776 void Assembler::addq(Address dst, int32_t imm32) { |
4777 InstructionMark im(this); |
4777 InstructionMark im(this); |
4822 emit_int8(0x23); |
4822 emit_int8(0x23); |
4823 emit_operand(dst, src); |
4823 emit_operand(dst, src); |
4824 } |
4824 } |
4825 |
4825 |
4826 void Assembler::andq(Register dst, Register src) { |
4826 void Assembler::andq(Register dst, Register src) { |
4827 (int) prefixq_and_encode(dst->encoding(), src->encoding()); |
4827 (void) prefixq_and_encode(dst->encoding(), src->encoding()); |
4828 emit_arith(0x23, 0xC0, dst, src); |
4828 emit_arith(0x23, 0xC0, dst, src); |
4829 } |
4829 } |
4830 |
4830 |
4831 void Assembler::bsfq(Register dst, Register src) { |
4831 void Assembler::bsfq(Register dst, Register src) { |
4832 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
4832 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |