jdk8-mips64-public/hotspot: comparison src/cpu/x86/vm/sharedRuntime_x86

-:0910903272e5
+:e66fd840cb6b
 // save code can segv when fxsave instructions find improperly
 // aligned stack pointer.
 __ movptr(rax, Address(rsp, 0));
+// Must preserve original SP for loading incoming arguments because
+// we need to align the outgoing SP for compiled code.
+__ movptr(r11, rsp);
 // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 // in registers, we will occasionally have no stack args.
 int comp_words_on_stack = 0;
 if (comp_args_on_stack) {
 // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 __ andptr(rsp, -16);
 // push the return address and misalign the stack that youngest frame always sees
 // as far as the placement of the call instruction
 __ push(rax);
+// Put saved SP in another register
+const Register saved_sp = rax;
+__ movptr(saved_sp, r11);
 // Will jump to the compiled code just as if compiled code was doing it.
 // Pre-load the register-jump target early, to schedule it better.
 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset())));
 // Pick up 0, 1 or 2 words from SP+offset.
 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 "scrambled load targets?");
 // Load in argument order going down.
-// int ld_off = (total_args_passed + comp_words_on_stack -i)*wordSize;
+int ld_off = (total_args_passed - i)*Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
-// base ld_off on r13 (sender_sp) as the stack alignment makes offsets from rsp
-// unpredictable
-int ld_off = ((total_args_passed - 1) - i)*Interpreter::stackElementSize();
 // Point to interpreter value (vs. tag)
 int next_off = ld_off - Interpreter::stackElementSize();
 //
 //
 //
 continue;
 }
 if (r_1->is_stack()) {
 // Convert stack slot to an SP offset (+ wordSize to account for return address )
 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
+// We can use r13 as a temp here because compiled code doesn't need r13 as an input
+// and if we end up going thru a c2i because of a miss a reasonable value of r13
+// will be generated.
 if (!r_2->is_valid()) {
 // sign extend???
-__ movl(rax, Address(r13, ld_off));
+__ movl(r13, Address(saved_sp, ld_off));
-__ movptr(Address(rsp, st_off), rax);
+__ movptr(Address(rsp, st_off), r13);
 } else {
 //
 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 // So we must adjust where to pick up the data to match the interpreter.
 // are accessed as negative so LSW is at LOW address
 // ld_off is MSW so get LSW
 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 next_off : ld_off;
-__ movq(rax, Address(r13, offset));
+__ movq(r13, Address(saved_sp, offset));
 // st_off is LSW (i.e. reg.first())
-__ movq(Address(rsp, st_off), rax);
+__ movq(Address(rsp, st_off), r13);
 }
 } else if (r_1->is_Register()) {  // Register argument
 Register r = r_1->as_Register();
 assert(r != rax, "must be different");
 if (r_2->is_valid()) {
 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 next_off : ld_off;
 // this can be a misaligned move
-__ movq(r, Address(r13, offset));
+__ movq(r, Address(saved_sp, offset));
 } else {
 // sign extend and use a full word?
-__ movl(r, Address(r13, ld_off));
+__ movl(r, Address(saved_sp, ld_off));
 }
 } else {
 if (!r_2->is_valid()) {
-__ movflt(r_1->as_XMMRegister(), Address(r13, ld_off));
+__ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 } else {
-__ movdbl(r_1->as_XMMRegister(), Address(r13, next_off));
+__ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
 }
 }
 }
 // 6243940 We might end up in handle_wrong_method if
 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
 __ pop(rdx);                  // No need for exception pc anymore
 // rax: exception handler
+// Restore SP from BP if the exception PC is a MethodHandle call.
+__ cmpl(Address(r15_thread, JavaThread::is_method_handle_exception_offset()), 0);
+__ cmovptr(Assembler::notEqual, rsp, rbp);
 // We have a handler in rax (could be deopt blob).
 __ mov(r8, rax);
 // Get the exception oop
 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));

comparison: src/cpu/x86/vm/sharedRuntime_x86_64.cpp

src/cpu/x86/vm/sharedRuntime_x86_64.cpp

Mercurial > jdk8-mips64-public > hotspot / file comparison

comparison: src/cpu/x86/vm/sharedRuntime_x86_64.cpp

src/cpu/x86/vm/sharedRuntime_x86_64.cpp