93 idealreg2spillmask [Op_RegP] = NULL; |
93 idealreg2spillmask [Op_RegP] = NULL; |
94 idealreg2spillmask [Op_VecS] = NULL; |
94 idealreg2spillmask [Op_VecS] = NULL; |
95 idealreg2spillmask [Op_VecD] = NULL; |
95 idealreg2spillmask [Op_VecD] = NULL; |
96 idealreg2spillmask [Op_VecX] = NULL; |
96 idealreg2spillmask [Op_VecX] = NULL; |
97 idealreg2spillmask [Op_VecY] = NULL; |
97 idealreg2spillmask [Op_VecY] = NULL; |
|
98 idealreg2spillmask [Op_RegFlags] = NULL; |
98 |
99 |
99 idealreg2debugmask [Op_RegI] = NULL; |
100 idealreg2debugmask [Op_RegI] = NULL; |
100 idealreg2debugmask [Op_RegN] = NULL; |
101 idealreg2debugmask [Op_RegN] = NULL; |
101 idealreg2debugmask [Op_RegL] = NULL; |
102 idealreg2debugmask [Op_RegL] = NULL; |
102 idealreg2debugmask [Op_RegF] = NULL; |
103 idealreg2debugmask [Op_RegF] = NULL; |
104 idealreg2debugmask [Op_RegP] = NULL; |
105 idealreg2debugmask [Op_RegP] = NULL; |
105 idealreg2debugmask [Op_VecS] = NULL; |
106 idealreg2debugmask [Op_VecS] = NULL; |
106 idealreg2debugmask [Op_VecD] = NULL; |
107 idealreg2debugmask [Op_VecD] = NULL; |
107 idealreg2debugmask [Op_VecX] = NULL; |
108 idealreg2debugmask [Op_VecX] = NULL; |
108 idealreg2debugmask [Op_VecY] = NULL; |
109 idealreg2debugmask [Op_VecY] = NULL; |
|
110 idealreg2debugmask [Op_RegFlags] = NULL; |
109 |
111 |
110 idealreg2mhdebugmask[Op_RegI] = NULL; |
112 idealreg2mhdebugmask[Op_RegI] = NULL; |
111 idealreg2mhdebugmask[Op_RegN] = NULL; |
113 idealreg2mhdebugmask[Op_RegN] = NULL; |
112 idealreg2mhdebugmask[Op_RegL] = NULL; |
114 idealreg2mhdebugmask[Op_RegL] = NULL; |
113 idealreg2mhdebugmask[Op_RegF] = NULL; |
115 idealreg2mhdebugmask[Op_RegF] = NULL; |
115 idealreg2mhdebugmask[Op_RegP] = NULL; |
117 idealreg2mhdebugmask[Op_RegP] = NULL; |
116 idealreg2mhdebugmask[Op_VecS] = NULL; |
118 idealreg2mhdebugmask[Op_VecS] = NULL; |
117 idealreg2mhdebugmask[Op_VecD] = NULL; |
119 idealreg2mhdebugmask[Op_VecD] = NULL; |
118 idealreg2mhdebugmask[Op_VecX] = NULL; |
120 idealreg2mhdebugmask[Op_VecX] = NULL; |
119 idealreg2mhdebugmask[Op_VecY] = NULL; |
121 idealreg2mhdebugmask[Op_VecY] = NULL; |
|
122 idealreg2mhdebugmask[Op_RegFlags] = NULL; |
120 |
123 |
121 debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
124 debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
122 } |
125 } |
123 |
126 |
124 //------------------------------warp_incoming_stk_arg------------------------ |
127 //------------------------------warp_incoming_stk_arg------------------------ |