src/cpu/x86/vm/x86_32.ad

changeset 838
b744678d4d71
parent 739
dc7f315e41f7
child 850
4d9884b01ba6
equal deleted inserted replaced
837:b4e0a161f551 838:b744678d4d71
4808 4808
4809 format %{ %} 4809 format %{ %}
4810 interface(CONST_INTER); 4810 interface(CONST_INTER);
4811 %} 4811 %}
4812 4812
4813 // Long Immediate zero
4814 operand immL_M1() %{
4815 predicate( n->get_long() == -1L );
4816 match(ConL);
4817 op_cost(0);
4818
4819 format %{ %}
4820 interface(CONST_INTER);
4821 %}
4822
4813 // Long immediate from 0 to 127. 4823 // Long immediate from 0 to 127.
4814 // Used for a shorter form of long mul by 10. 4824 // Used for a shorter form of long mul by 10.
4815 operand immL_127() %{ 4825 operand immL_127() %{
4816 predicate((0 <= n->get_long()) && (n->get_long() <= 127)); 4826 predicate((0 <= n->get_long()) && (n->get_long() <= 127));
4817 match(ConL); 4827 match(ConL);
8619 opcode(0x33); 8629 opcode(0x33);
8620 ins_encode( OpcP, RegReg( dst, src) ); 8630 ins_encode( OpcP, RegReg( dst, src) );
8621 ins_pipe( ialu_reg_reg ); 8631 ins_pipe( ialu_reg_reg );
8622 %} 8632 %}
8623 8633
8634 // Xor Register with Immediate -1
8635 instruct xorI_eReg_im1(eRegI dst, immI_M1 imm) %{
8636 match(Set dst (XorI dst imm));
8637
8638 size(2);
8639 format %{ "NOT $dst" %}
8640 ins_encode %{
8641 __ notl($dst$$Register);
8642 %}
8643 ins_pipe( ialu_reg );
8644 %}
8645
8624 // Xor Register with Immediate 8646 // Xor Register with Immediate
8625 instruct xorI_eReg_imm(eRegI dst, immI src, eFlagsReg cr) %{ 8647 instruct xorI_eReg_imm(eRegI dst, immI src, eFlagsReg cr) %{
8626 match(Set dst (XorI dst src)); 8648 match(Set dst (XorI dst src));
8627 effect(KILL cr); 8649 effect(KILL cr);
8628 8650
8934 format %{ "XOR $dst.lo,$src.lo\n\t" 8956 format %{ "XOR $dst.lo,$src.lo\n\t"
8935 "XOR $dst.hi,$src.hi" %} 8957 "XOR $dst.hi,$src.hi" %}
8936 opcode(0x33,0x33); 8958 opcode(0x33,0x33);
8937 ins_encode( RegReg_Lo( dst, src), RegReg_Hi( dst, src) ); 8959 ins_encode( RegReg_Lo( dst, src), RegReg_Hi( dst, src) );
8938 ins_pipe( ialu_reg_reg_long ); 8960 ins_pipe( ialu_reg_reg_long );
8961 %}
8962
8963 // Xor Long Register with Immediate -1
8964 instruct xorl_eReg_im1(eRegL dst, immL_M1 imm) %{
8965 match(Set dst (XorL dst imm));
8966 format %{ "NOT $dst.lo\n\t"
8967 "NOT $dst.hi" %}
8968 ins_encode %{
8969 __ notl($dst$$Register);
8970 __ notl(HIGH_FROM_LOW($dst$$Register));
8971 %}
8972 ins_pipe( ialu_reg_long );
8939 %} 8973 %}
8940 8974
8941 // Xor Long Register with Immediate 8975 // Xor Long Register with Immediate
8942 instruct xorl_eReg_imm(eRegL dst, immL src, eFlagsReg cr) %{ 8976 instruct xorl_eReg_imm(eRegL dst, immL src, eFlagsReg cr) %{
8943 match(Set dst (XorL dst src)); 8977 match(Set dst (XorL dst src));

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