src/cpu/sparc/vm/vm_version_sparc.cpp

changeset 7027
b20a35eae442
parent 6680
78bbf4d43a14
child 7135
d635fd1ac81c
equal deleted inserted replaced
7026:922c87c9aed4 7027:b20a35eae442
232 232
233 assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); 233 assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
234 assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); 234 assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
235 235
236 char buf[512]; 236 char buf[512];
237 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 237 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
238 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")), 238 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")),
239 (has_hardware_popc() ? ", popc" : ""), 239 (has_hardware_popc() ? ", popc" : ""),
240 (has_vis1() ? ", vis1" : ""), 240 (has_vis1() ? ", vis1" : ""),
241 (has_vis2() ? ", vis2" : ""), 241 (has_vis2() ? ", vis2" : ""),
242 (has_vis3() ? ", vis3" : ""), 242 (has_vis3() ? ", vis3" : ""),
243 (has_blk_init() ? ", blk_init" : ""), 243 (has_blk_init() ? ", blk_init" : ""),
244 (has_cbcond() ? ", cbcond" : ""), 244 (has_cbcond() ? ", cbcond" : ""),
245 (has_aes() ? ", aes" : ""), 245 (has_aes() ? ", aes" : ""),
246 (has_sha1() ? ", sha1" : ""),
247 (has_sha256() ? ", sha256" : ""),
248 (has_sha512() ? ", sha512" : ""),
246 (is_ultra3() ? ", ultra3" : ""), 249 (is_ultra3() ? ", ultra3" : ""),
247 (is_sun4v() ? ", sun4v" : ""), 250 (is_sun4v() ? ", sun4v" : ""),
248 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")), 251 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")),
249 (is_sparc64() ? ", sparc64" : ""), 252 (is_sparc64() ? ", sparc64" : ""),
250 (!has_hardware_mul32() ? ", no-mul32" : ""), 253 (!has_hardware_mul32() ? ", no-mul32" : ""),
299 if (UseAESIntrinsics) { 302 if (UseAESIntrinsics) {
300 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 303 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
301 } 304 }
302 } 305 }
303 306
307 // SHA1, SHA256, and SHA512 instructions were added to SPARC T-series at different times
308 if (has_sha1() || has_sha256() || has_sha512()) {
309 if (UseVIS > 0) { // SHA intrinsics use VIS1 instructions
310 if (FLAG_IS_DEFAULT(UseSHA)) {
311 FLAG_SET_DEFAULT(UseSHA, true);
312 }
313 } else {
314 if (UseSHA) {
315 warning("SPARC SHA intrinsics require VIS1 instruction support. Intrinsics will be disabled.");
316 FLAG_SET_DEFAULT(UseSHA, false);
317 }
318 }
319 } else if (UseSHA) {
320 warning("SHA instructions are not available on this CPU");
321 FLAG_SET_DEFAULT(UseSHA, false);
322 }
323
324 if (!UseSHA) {
325 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
326 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
327 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
328 } else {
329 if (has_sha1()) {
330 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
331 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
332 }
333 } else if (UseSHA1Intrinsics) {
334 warning("SHA1 instruction is not available on this CPU.");
335 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
336 }
337 if (has_sha256()) {
338 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
339 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
340 }
341 } else if (UseSHA256Intrinsics) {
342 warning("SHA256 instruction (for SHA-224 and SHA-256) is not available on this CPU.");
343 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
344 }
345
346 if (has_sha512()) {
347 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
348 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
349 }
350 } else if (UseSHA512Intrinsics) {
351 warning("SHA512 instruction (for SHA-384 and SHA-512) is not available on this CPU.");
352 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
353 }
354 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
355 FLAG_SET_DEFAULT(UseSHA, false);
356 }
357 }
358
304 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && 359 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
305 (cache_line_size > ContendedPaddingWidth)) 360 (cache_line_size > ContendedPaddingWidth))
306 ContendedPaddingWidth = cache_line_size; 361 ContendedPaddingWidth = cache_line_size;
307 362
308 #ifndef PRODUCT 363 #ifndef PRODUCT

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