1 /* |
1 /* |
2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * |
4 * |
5 * This code is free software; you can redistribute it and/or modify it |
5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as |
6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. |
7 * published by the Free Software Foundation. |
672 static address locate_next_instruction(address inst); |
672 static address locate_next_instruction(address inst); |
673 |
673 |
674 // Utilities |
674 // Utilities |
675 |
675 |
676 #ifdef _LP64 |
676 #ifdef _LP64 |
677 static bool is_simm(int64_t x, int nbits) { return -( CONST64(1) << (nbits-1) ) <= x && x < ( CONST64(1) << (nbits-1) ); } |
677 static bool is_simm(int64_t x, int nbits) { return -(CONST64(1) << (nbits-1)) <= x && |
|
678 x < (CONST64(1) << (nbits-1)); } |
678 static bool is_simm32(int64_t x) { return x == (int64_t)(int32_t)x; } |
679 static bool is_simm32(int64_t x) { return x == (int64_t)(int32_t)x; } |
679 #else |
680 #else |
680 static bool is_simm(int32_t x, int nbits) { return -( 1 << (nbits-1) ) <= x && x < ( 1 << (nbits-1) ); } |
681 static bool is_simm(int32_t x, int nbits) { return -(1 << (nbits-1)) <= x && |
|
682 x < (1 << (nbits-1)); } |
681 static bool is_simm32(int32_t x) { return true; } |
683 static bool is_simm32(int32_t x) { return true; } |
682 #endif // LP64 |
684 #endif // _LP64 |
683 |
685 |
684 // Generic instructions |
686 // Generic instructions |
685 // Does 32bit or 64bit as needed for the platform. In some sense these |
687 // Does 32bit or 64bit as needed for the platform. In some sense these |
686 // belong in macro assembler but there is no need for both varieties to exist |
688 // belong in macro assembler but there is no need for both varieties to exist |
687 |
689 |
714 void repne_scanl(); |
715 void repne_scanl(); |
715 #endif |
716 #endif |
716 |
717 |
717 // Vanilla instructions in lexical order |
718 // Vanilla instructions in lexical order |
718 |
719 |
|
720 void adcl(Address dst, int32_t imm32); |
|
721 void adcl(Address dst, Register src); |
719 void adcl(Register dst, int32_t imm32); |
722 void adcl(Register dst, int32_t imm32); |
720 void adcl(Register dst, Address src); |
723 void adcl(Register dst, Address src); |
721 void adcl(Register dst, Register src); |
724 void adcl(Register dst, Register src); |
722 |
725 |
723 void adcq(Register dst, int32_t imm32); |
726 void adcq(Register dst, int32_t imm32); |
724 void adcq(Register dst, Address src); |
727 void adcq(Register dst, Address src); |
725 void adcq(Register dst, Register src); |
728 void adcq(Register dst, Register src); |
726 |
|
727 |
729 |
728 void addl(Address dst, int32_t imm32); |
730 void addl(Address dst, int32_t imm32); |
729 void addl(Address dst, Register src); |
731 void addl(Address dst, Register src); |
730 void addl(Register dst, int32_t imm32); |
732 void addl(Register dst, int32_t imm32); |
731 void addl(Register dst, Address src); |
733 void addl(Register dst, Address src); |
735 void addq(Address dst, Register src); |
737 void addq(Address dst, Register src); |
736 void addq(Register dst, int32_t imm32); |
738 void addq(Register dst, int32_t imm32); |
737 void addq(Register dst, Address src); |
739 void addq(Register dst, Address src); |
738 void addq(Register dst, Register src); |
740 void addq(Register dst, Register src); |
739 |
741 |
740 |
|
741 void addr_nop_4(); |
742 void addr_nop_4(); |
742 void addr_nop_5(); |
743 void addr_nop_5(); |
743 void addr_nop_7(); |
744 void addr_nop_7(); |
744 void addr_nop_8(); |
745 void addr_nop_8(); |
745 |
746 |
756 void andl(Register dst, Register src); |
757 void andl(Register dst, Register src); |
757 |
758 |
758 void andq(Register dst, int32_t imm32); |
759 void andq(Register dst, int32_t imm32); |
759 void andq(Register dst, Address src); |
760 void andq(Register dst, Address src); |
760 void andq(Register dst, Register src); |
761 void andq(Register dst, Register src); |
761 |
|
762 |
762 |
763 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values |
763 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values |
764 void andpd(XMMRegister dst, Address src); |
764 void andpd(XMMRegister dst, Address src); |
765 void andpd(XMMRegister dst, XMMRegister src); |
765 void andpd(XMMRegister dst, XMMRegister src); |
766 |
766 |
1149 void movl(Register dst, void* junk); |
1149 void movl(Register dst, void* junk); |
1150 |
1150 |
1151 #ifdef _LP64 |
1151 #ifdef _LP64 |
1152 void movq(Register dst, Register src); |
1152 void movq(Register dst, Register src); |
1153 void movq(Register dst, Address src); |
1153 void movq(Register dst, Address src); |
1154 void movq(Address dst, Register src); |
1154 void movq(Address dst, Register src); |
1155 #endif |
1155 #endif |
1156 |
1156 |
1157 void movq(Address dst, MMXRegister src ); |
1157 void movq(Address dst, MMXRegister src ); |
1158 void movq(MMXRegister dst, Address src ); |
1158 void movq(MMXRegister dst, Address src ); |
1159 |
1159 |
1175 #ifdef _LP64 |
1175 #ifdef _LP64 |
1176 void movsbq(Register dst, Address src); |
1176 void movsbq(Register dst, Address src); |
1177 void movsbq(Register dst, Register src); |
1177 void movsbq(Register dst, Register src); |
1178 |
1178 |
1179 // Move signed 32bit immediate to 64bit extending sign |
1179 // Move signed 32bit immediate to 64bit extending sign |
1180 void movslq(Address dst, int32_t imm64); |
1180 void movslq(Address dst, int32_t imm64); |
1181 void movslq(Register dst, int32_t imm64); |
1181 void movslq(Register dst, int32_t imm64); |
1182 |
1182 |
1183 void movslq(Register dst, Address src); |
1183 void movslq(Register dst, Address src); |
1184 void movslq(Register dst, Register src); |
1184 void movslq(Register dst, Register src); |
1185 void movslq(Register dst, void* src); // Dummy declaration to cause NULL to be ambiguous |
1185 void movslq(Register dst, void* src); // Dummy declaration to cause NULL to be ambiguous |
1855 int con_size_in_bytes, // object size in bytes if known at compile time |
1855 int con_size_in_bytes, // object size in bytes if known at compile time |
1856 Register t1, // temp register |
1856 Register t1, // temp register |
1857 Register t2, // temp register |
1857 Register t2, // temp register |
1858 Label& slow_case // continuation point if fast allocation fails |
1858 Label& slow_case // continuation point if fast allocation fails |
1859 ); |
1859 ); |
1860 void tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case); |
1860 Register tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case); // returns TLS address |
|
1861 void incr_allocated_bytes(Register thread, |
|
1862 Register var_size_in_bytes, int con_size_in_bytes, |
|
1863 Register t1 = noreg); |
1861 |
1864 |
1862 // interface method calling |
1865 // interface method calling |
1863 void lookup_interface_method(Register recv_klass, |
1866 void lookup_interface_method(Register recv_klass, |
1864 Register intf_klass, |
1867 Register intf_klass, |
1865 RegisterOrConstant itable_index, |
1868 RegisterOrConstant itable_index, |
2178 |
2181 |
2179 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); } |
2182 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); } |
2180 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); } |
2183 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); } |
2181 void divss(XMMRegister dst, AddressLiteral src) { Assembler::divss(dst, as_Address(src)); } |
2184 void divss(XMMRegister dst, AddressLiteral src) { Assembler::divss(dst, as_Address(src)); } |
2182 |
2185 |
2183 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); } |
2186 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); } |
2184 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); } |
2187 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); } |
2185 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); } |
2188 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); } |
2186 void movsd(XMMRegister dst, AddressLiteral src) { Assembler::movsd(dst, as_Address(src)); } |
2189 void movsd(XMMRegister dst, AddressLiteral src) { Assembler::movsd(dst, as_Address(src)); } |
2187 |
2190 |
2188 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); } |
2191 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); } |
2189 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); } |
2192 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); } |
2190 void mulsd(XMMRegister dst, AddressLiteral src) { Assembler::mulsd(dst, as_Address(src)); } |
2193 void mulsd(XMMRegister dst, AddressLiteral src) { Assembler::mulsd(dst, as_Address(src)); } |