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comparison: src/share/vm/c1/c1_LIR.hpp

src/share/vm/c1/c1_LIR.hpp

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20 * or visit www.oracle.com if you need additional information or have any 20 * or visit www.oracle.com if you need additional information or have any
21 * questions. 21 * questions.
22 * 22 *
23 */ 23 */
24 24
25 /*
26 * This file has been modified by Loongson Technology in 2015. These
27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
30
25 #ifndef SHARE_VM_C1_C1_LIR_HPP 31 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP 32 #define SHARE_VM_C1_C1_LIR_HPP
27 33
28 #include "c1/c1_Defs.hpp" 34 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp" 35 #include "c1/c1_ValueType.hpp"
454 #endif // X86 460 #endif // X86
455 #if defined(SPARC) || defined(ARM) || defined(PPC) 461 #if defined(SPARC) || defined(ARM) || defined(PPC)
456 FloatRegister as_float_reg () const; 462 FloatRegister as_float_reg () const;
457 FloatRegister as_double_reg () const; 463 FloatRegister as_double_reg () const;
458 #endif 464 #endif
465 #ifdef MIPS64
466 FloatRegister as_float_reg () const;
467 FloatRegister as_double_reg () const;
468
469 FloatRegister as_fpu_lo () const;
470 FloatRegister as_fpu_hi () const;
471
472 #endif
459 473
460 jint as_jint() const { return as_constant_ptr()->as_jint(); } 474 jint as_jint() const { return as_constant_ptr()->as_jint(); }
461 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 475 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
462 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 476 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
463 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 477 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
526 , _index(index) 540 , _index(index)
527 , _scale(times_1) 541 , _scale(times_1)
528 , _type(type) 542 , _type(type)
529 , _disp(0) { verify(); } 543 , _disp(0) { verify(); }
530 544
545 #ifndef MIPS64
531 LIR_Address(LIR_Opr base, intx disp, BasicType type): 546 LIR_Address(LIR_Opr base, intx disp, BasicType type):
547 #else
548 LIR_Address(LIR_Opr base, int disp, BasicType type):
549 #endif
532 _base(base) 550 _base(base)
533 , _index(LIR_OprDesc::illegalOpr()) 551 , _index(LIR_OprDesc::illegalOpr())
534 , _scale(times_1) 552 , _scale(times_1)
535 , _type(type) 553 , _type(type)
536 , _disp(disp) { verify(); } 554 , _disp(disp) { verify(); }
657 (reg1 << LIR_OprDesc::reg2_shift) | 675 (reg1 << LIR_OprDesc::reg2_shift) |
658 LIR_OprDesc::double_type | 676 LIR_OprDesc::double_type |
659 LIR_OprDesc::cpu_register | 677 LIR_OprDesc::cpu_register |
660 LIR_OprDesc::double_size); } 678 LIR_OprDesc::double_size); }
661 #endif // PPC 679 #endif // PPC
680 #ifdef MIPS64
681 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
682 (reg << LIR_OprDesc::reg2_shift) |
683 LIR_OprDesc::double_type |
684 LIR_OprDesc::fpu_register |
685 LIR_OprDesc::double_size); }
686 #endif
662 687
663 static LIR_Opr virtual_register(int index, BasicType type) { 688 static LIR_Opr virtual_register(int index, BasicType type) {
664 LIR_Opr res; 689 LIR_Opr res;
665 switch (type) { 690 switch (type) {
666 case T_OBJECT: // fall through 691 case T_OBJECT: // fall through
922 , lir_pop 947 , lir_pop
923 , lir_null_check 948 , lir_null_check
924 , lir_return 949 , lir_return
925 , lir_leal 950 , lir_leal
926 , lir_neg 951 , lir_neg
952 #ifndef MIPS64
927 , lir_branch 953 , lir_branch
928 , lir_cond_float_branch 954 , lir_cond_float_branch
955 #endif
929 , lir_move 956 , lir_move
930 , lir_prefetchr 957 , lir_prefetchr
931 , lir_prefetchw 958 , lir_prefetchw
932 , lir_convert 959 , lir_convert
933 , lir_alloc_object 960 , lir_alloc_object
937 , lir_pack64 964 , lir_pack64
938 , lir_unpack64 965 , lir_unpack64
939 , lir_unwind 966 , lir_unwind
940 , end_op1 967 , end_op1
941 , begin_op2 968 , begin_op2
969 #ifdef MIPS64
970 , lir_branch
971 , lir_cond_float_branch
972 , lir_null_check_for_branch
973 #else
942 , lir_cmp 974 , lir_cmp
975 #endif
943 , lir_cmp_l2i 976 , lir_cmp_l2i
944 , lir_ucmp_fd2i 977 , lir_ucmp_fd2i
945 , lir_cmp_fd2i 978 , lir_cmp_fd2i
946 , lir_cmove 979 , lir_cmove
947 , lir_add 980 , lir_add
971 , lir_compare_to 1004 , lir_compare_to
972 , lir_xadd 1005 , lir_xadd
973 , lir_xchg 1006 , lir_xchg
974 , end_op2 1007 , end_op2
975 , begin_op3 1008 , begin_op3
1009 #ifdef MIPS64
1010 , lir_frem
1011 #endif
976 , lir_idiv 1012 , lir_idiv
977 , lir_irem 1013 , lir_irem
978 , end_op3 1014 , end_op3
979 , begin_opJavaCall 1015 , begin_opJavaCall
980 , lir_static_call 1016 , lir_static_call
1420 1456
1421 virtual void verify() const; 1457 virtual void verify() const;
1422 }; 1458 };
1423 1459
1424 1460
1461 #ifndef MIPS64
1425 class LIR_OpBranch: public LIR_Op { 1462 class LIR_OpBranch: public LIR_Op {
1426 friend class LIR_OpVisitState; 1463 friend class LIR_OpVisitState;
1427 1464
1428 private: 1465 private:
1429 LIR_Condition _cond; 1466 LIR_Condition _cond;
1462 1499
1463 virtual void emit_code(LIR_Assembler* masm); 1500 virtual void emit_code(LIR_Assembler* masm);
1464 virtual LIR_OpBranch* as_OpBranch() { return this; } 1501 virtual LIR_OpBranch* as_OpBranch() { return this; }
1465 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1502 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1466 }; 1503 };
1504 #endif
1467 1505
1468 1506
1469 class ConversionStub; 1507 class ConversionStub;
1470 1508
1471 class LIR_OpConvert: public LIR_Op1 { 1509 class LIR_OpConvert: public LIR_Op1 {
1512 1550
1513 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1551 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1514 }; 1552 };
1515 1553
1516 1554
1555 #ifndef MIPS64
1517 // LIR_OpAllocObj 1556 // LIR_OpAllocObj
1518 class LIR_OpAllocObj : public LIR_Op1 { 1557 class LIR_OpAllocObj : public LIR_Op1 {
1519 friend class LIR_OpVisitState; 1558 friend class LIR_OpVisitState;
1520 1559
1521 private: 1560 private:
1555 1594
1556 virtual void emit_code(LIR_Assembler* masm); 1595 virtual void emit_code(LIR_Assembler* masm);
1557 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1596 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1558 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1597 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1559 }; 1598 };
1599 #else
1600 class LIR_OpAllocObj : public LIR_Op1 {
1601 friend class LIR_OpVisitState;
1602
1603 private:
1604 LIR_Opr _tmp1;
1605 LIR_Opr _tmp2;
1606 LIR_Opr _tmp3;
1607 LIR_Opr _tmp4;
1608 LIR_Opr _tmp5;
1609 LIR_Opr _tmp6;
1610 int _hdr_size;
1611 int _obj_size;
1612 CodeStub* _stub;
1613 bool _init_check;
1614
1615 public:
1616 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1617 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1618 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1619 : LIR_Op1(lir_alloc_object, klass, result)
1620 , _tmp1(t1)
1621 , _tmp2(t2)
1622 , _tmp3(t3)
1623 , _tmp4(t4)
1624 , _tmp5(t5)
1625 , _tmp6(t6)
1626 , _hdr_size(hdr_size)
1627 , _obj_size(obj_size)
1628 , _init_check(init_check)
1629 , _stub(stub) { }
1630
1631 LIR_Opr klass() const { return in_opr(); }
1632 LIR_Opr obj() const { return result_opr(); }
1633 LIR_Opr tmp1() const { return _tmp1; }
1634 LIR_Opr tmp2() const { return _tmp2; }
1635 LIR_Opr tmp3() const { return _tmp3; }
1636 LIR_Opr tmp4() const { return _tmp4; }
1637 LIR_Opr tmp5() const { return _tmp5; }
1638 LIR_Opr tmp6() const { return _tmp6; }
1639 int header_size() const { return _hdr_size; }
1640 int object_size() const { return _obj_size; }
1641 bool init_check() const { return _init_check; }
1642 CodeStub* stub() const { return _stub; }
1643
1644 virtual void emit_code(LIR_Assembler* masm);
1645 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1646 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1647 };
1648 #endif
1560 1649
1561 1650
1562 // LIR_OpRoundFP 1651 // LIR_OpRoundFP
1563 class LIR_OpRoundFP : public LIR_Op1 { 1652 class LIR_OpRoundFP : public LIR_Op1 {
1564 friend class LIR_OpVisitState; 1653 friend class LIR_OpVisitState;
1625 virtual void emit_code(LIR_Assembler* masm); 1714 virtual void emit_code(LIR_Assembler* masm);
1626 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1715 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1627 void print_instr(outputStream* out) const PRODUCT_RETURN; 1716 void print_instr(outputStream* out) const PRODUCT_RETURN;
1628 }; 1717 };
1629 1718
1719 #ifndef MIPS64
1630 // LIR_Op2 1720 // LIR_Op2
1631 class LIR_Op2: public LIR_Op { 1721 class LIR_Op2: public LIR_Op {
1632 friend class LIR_OpVisitState; 1722 friend class LIR_OpVisitState;
1633 1723
1634 int _fpu_stack_size; // for sin/cos implementation on Intel 1724 int _fpu_stack_size; // for sin/cos implementation on Intel
1733 1823
1734 virtual void emit_code(LIR_Assembler* masm); 1824 virtual void emit_code(LIR_Assembler* masm);
1735 virtual LIR_Op2* as_Op2() { return this; } 1825 virtual LIR_Op2* as_Op2() { return this; }
1736 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1826 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1737 }; 1827 };
1738 1828 #else
1829 class LIR_Op2: public LIR_Op {
1830 //friend class LIR_Optimizer;
1831 friend class LIR_OpVisitState;
1832 protected:
1833 LIR_Opr _opr1;
1834 LIR_Opr _opr2;
1835 BasicType _type;
1836 LIR_Opr _tmp1;
1837 LIR_Opr _tmp2;
1838 LIR_Opr _tmp3;
1839 LIR_Opr _tmp4;
1840 LIR_Opr _tmp5;
1841
1842 virtual void verify() const;
1843 public:
1844 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1845 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1846 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1847 _opr1(opr1), _opr2(opr2),
1848 _type(type),
1849 _tmp1(LIR_OprFact::illegalOpr),
1850 _tmp2(LIR_OprFact::illegalOpr),
1851 _tmp3(LIR_OprFact::illegalOpr),
1852 _tmp4(LIR_OprFact::illegalOpr),
1853 _tmp5(LIR_OprFact::illegalOpr) {
1854 }
1855
1856 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1857 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1858 : LIR_Op(code, result, info),
1859 _opr1(opr1), _opr2(opr2),
1860 _type(type),
1861 _tmp1(LIR_OprFact::illegalOpr),
1862 _tmp2(LIR_OprFact::illegalOpr),
1863 _tmp3(LIR_OprFact::illegalOpr),
1864 _tmp4(LIR_OprFact::illegalOpr),
1865 _tmp5(LIR_OprFact::illegalOpr) {
1866
1867 assert(is_in_range(code, begin_op2, end_op2), "code check");
1868 }
1869
1870
1871 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1872 : LIR_Op(code, result, NULL),
1873 _opr1(opr1), _opr2(opr2),
1874 _type(T_ILLEGAL),
1875 _tmp1(tmp1),
1876 _tmp2(tmp2),
1877 _tmp3(tmp3),
1878 _tmp4(tmp4),
1879 _tmp5(tmp5) {
1880 assert(is_in_range(code, begin_op2, end_op2), "code check");
1881 }
1882
1883 LIR_Opr in_opr1() const { return _opr1; }
1884 LIR_Opr in_opr2() const { return _opr2; }
1885 BasicType type() const { return _type; }
1886 LIR_Opr tmp1_opr() const { return _tmp1; }
1887 LIR_Opr tmp2_opr() const { return _tmp2; }
1888 LIR_Opr tmp3_opr() const { return _tmp3; }
1889 LIR_Opr tmp4_opr() const { return _tmp4; }
1890 LIR_Opr tmp5_opr() const { return _tmp5; }
1891
1892
1893 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1894 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1895 // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome
1896 //virtual void emit_code(LIR_AbstractAssembler* masm);
1897 virtual void emit_code(LIR_Assembler* masm);
1898 virtual LIR_Op2* as_Op2() { return this; }
1899
1900 // virtual void print_instr() const PRODUCT_RETURN;
1901 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1902 };
1903
1904
1905 class LIR_OpBranch: public LIR_Op2 {
1906 friend class LIR_OpVisitState;
1907 public:
1908
1909 private:
1910 LIR_Condition _cond;
1911 BasicType _type;
1912 Label* _label;
1913 BlockBegin* _block; // if this is a branch to a block, this is the block
1914 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1915 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1916
1917 public:
1918 // these are temporary constructors until we start using the conditional register
1919 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1920 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1921 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1922 {
1923 }
1924
1925 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1926
1927 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1928
1929 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1930
1931 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1932 BlockBegin *block,BlockBegin *ublock);
1933
1934 LIR_Condition cond() const { return _cond; }
1935 BasicType type() const { return _type; }
1936 LIR_Opr left() const { return in_opr1(); }
1937 LIR_Opr right() const { return in_opr2(); }
1938 Label* label() const { return _label; }
1939 BlockBegin* block() const { return _block; }
1940 BlockBegin* ublock() const { return _ublock; }
1941 CodeStub* stub() const { return _stub; }
1942
1943
1944 void change_block(BlockBegin* b);
1945 void change_ublock(BlockBegin* b);
1946 void negate_cond();
1947
1948
1949 // 12/21,06,jerome
1950 //virtual void emit_code(LIR_AbstractAssembler* masm);
1951 virtual void emit_code(LIR_Assembler* masm);
1952 virtual LIR_OpBranch* as_OpBranch() { return this; }
1953 //virtual void print_instr() const PRODUCT_RETURN;
1954 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1955
1956 };
1957 #endif
1958
1959 #ifndef MIPS64
1739 class LIR_OpAllocArray : public LIR_Op { 1960 class LIR_OpAllocArray : public LIR_Op {
1740 friend class LIR_OpVisitState; 1961 friend class LIR_OpVisitState;
1741 1962
1742 private: 1963 private:
1743 LIR_Opr _klass; 1964 LIR_Opr _klass;
1773 1994
1774 virtual void emit_code(LIR_Assembler* masm); 1995 virtual void emit_code(LIR_Assembler* masm);
1775 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1996 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1776 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1997 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1777 }; 1998 };
1999 #else
2000 class LIR_OpAllocArray : public LIR_Op {
2001 friend class LIR_OpVisitState;
2002
2003 private:
2004 LIR_Opr _klass;
2005 LIR_Opr _len;
2006 LIR_Opr _tmp1;
2007 LIR_Opr _tmp2;
2008 LIR_Opr _tmp3;
2009 LIR_Opr _tmp4;
2010 LIR_Opr _tmp5;
2011 BasicType _type;
2012 CodeStub* _stub;
2013
2014 public:
2015 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2016 : LIR_Op(lir_alloc_array, result, NULL)
2017 , _klass(klass)
2018 , _len(len)
2019 , _tmp1(t1)
2020 , _tmp2(t2)
2021 , _tmp3(t3)
2022 , _tmp4(t4)
2023 , _tmp5(t5)
2024 , _type(type)
2025 , _stub(stub) {}
2026
2027 LIR_Opr klass() const { return _klass; }
2028 LIR_Opr len() const { return _len; }
2029 LIR_Opr obj() const { return result_opr(); }
2030 LIR_Opr tmp1() const { return _tmp1; }
2031 LIR_Opr tmp2() const { return _tmp2; }
2032 LIR_Opr tmp3() const { return _tmp3; }
2033 LIR_Opr tmp4() const { return _tmp4; }
2034 LIR_Opr tmp5() const { return _tmp5; }
2035 BasicType type() const { return _type; }
2036 CodeStub* stub() const { return _stub; }
2037
2038 virtual void emit_code(LIR_Assembler* masm);
2039 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2040 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2041 };
2042 #endif
1778 2043
1779 2044
1780 class LIR_Op3: public LIR_Op { 2045 class LIR_Op3: public LIR_Op {
1781 friend class LIR_OpVisitState; 2046 friend class LIR_OpVisitState;
1782 2047
2166 } 2431 }
2167 2432
2168 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 2433 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2169 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 2434 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2170 2435
2436 #ifndef MIPS64
2171 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 2437 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2172 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 2438 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2173 } 2439 }
2174 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 2440 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2175 cmp(condition, left, LIR_OprFact::intConst(right), info); 2441 cmp(condition, left, LIR_OprFact::intConst(right), info);
2180 2446
2181 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { 2447 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2182 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); 2448 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2183 } 2449 }
2184 2450
2451 #else
2452 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2453 CodeEmitInfo* info = NULL) {
2454 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2455 }
2456
2457 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2458 CodeEmitInfo* info = NULL) {
2459 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2460 }
2461
2462 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2463 CodeEmitInfo* info) {
2464 append(new LIR_Op2(lir_null_check_for_branch, condition,
2465 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2466 LIR_OprFact::intConst(c),
2467 info, T_INT));
2468 }
2469
2470 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2471 CodeEmitInfo* info) {
2472 append(new LIR_Op2(lir_null_check_for_branch, condition,
2473 reg,
2474 LIR_OprFact::address(addr),
2475 info));
2476 }
2477
2478 #endif
2479 #ifndef MIPS64
2185 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2480 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2186 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2481 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2187 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2482 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2188 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2483 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2189 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2484 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2190 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2485 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2486 #else
2487 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2488 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2489 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2490 #endif
2191 2491
2192 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 2492 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2193 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 2493 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2194 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } 2494 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2195 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2495 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2218 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2518 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2219 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2519 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2220 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2520 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2221 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2521 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2222 2522
2523 #ifdef MIPS64
2524 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2525 #endif
2526
2223 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2527 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2224 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2528 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2225 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2529 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2226 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2530 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2227 2531
2532 #ifndef MIPS64
2228 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 2533 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2229 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 2534 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2535 #else
2536 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2537 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2538 #endif
2230 2539
2231 // jump is an unconditional branch 2540 // jump is an unconditional branch
2232 void jump(BlockBegin* block) { 2541 void jump(BlockBegin* block) {
2542 #ifndef MIPS64
2233 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 2543 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2544 #else
2545 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2546 #endif
2234 } 2547 }
2235 void jump(CodeStub* stub) { 2548 void jump(CodeStub* stub) {
2549 #ifndef MIPS64
2236 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2550 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2237 } 2551 #else
2552 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2553 #endif
2554 }
2555 #ifndef MIPS64
2238 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } 2556 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2239 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2557 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2240 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2558 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2241 append(new LIR_OpBranch(cond, type, block)); 2559 append(new LIR_OpBranch(cond, type, block));
2242 } 2560 }
2246 } 2564 }
2247 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2565 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2248 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2566 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2249 append(new LIR_OpBranch(cond, type, block, unordered)); 2567 append(new LIR_OpBranch(cond, type, block, unordered));
2250 } 2568 }
2569 #else
2570 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2571 append(new LIR_OpBranch(cond, left, right, lbl));
2572 }
2573
2574 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2575 append(new LIR_OpBranch(cond, left, right, type, block));
2576 }
2577
2578 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2579 append(new LIR_OpBranch(cond, left, right, type, stub));
2580 }
2581
2582 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2583 BlockBegin* block, BlockBegin* unordered) {
2584 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2585 }
2586
2587 #endif
2251 2588
2252 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2589 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2253 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2590 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2254 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2591 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2255 2592

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