124 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
124 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
125 virtual const Type *Value( PhaseTransform *phase ) const; |
125 virtual const Type *Value( PhaseTransform *phase ) const; |
126 virtual uint ideal_reg() const { return NotAMachineReg; } |
126 virtual uint ideal_reg() const { return NotAMachineReg; } |
127 virtual uint match_edge(uint idx) const; |
127 virtual uint match_edge(uint idx) const; |
128 #ifndef PRODUCT |
128 #ifndef PRODUCT |
129 virtual void dump_req() const; |
129 virtual void dump_req(outputStream *st = tty) const; |
130 #endif |
130 #endif |
131 }; |
131 }; |
132 |
132 |
133 |
133 |
134 //------------------------------RethrowNode------------------------------------ |
134 //------------------------------RethrowNode------------------------------------ |
145 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
145 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); |
146 virtual const Type *Value( PhaseTransform *phase ) const; |
146 virtual const Type *Value( PhaseTransform *phase ) const; |
147 virtual uint match_edge(uint idx) const; |
147 virtual uint match_edge(uint idx) const; |
148 virtual uint ideal_reg() const { return NotAMachineReg; } |
148 virtual uint ideal_reg() const { return NotAMachineReg; } |
149 #ifndef PRODUCT |
149 #ifndef PRODUCT |
150 virtual void dump_req() const; |
150 virtual void dump_req(outputStream *st = tty) const; |
151 #endif |
151 #endif |
152 }; |
152 }; |
153 |
153 |
154 |
154 |
155 //------------------------------TailCallNode----------------------------------- |
155 //------------------------------TailCallNode----------------------------------- |