5040 __ movzwq($dst$$Register, $mem$$Address); |
5051 __ movzwq($dst$$Register, $mem$$Address); |
5041 %} |
5052 %} |
5042 ins_pipe(ialu_reg_mem); |
5053 ins_pipe(ialu_reg_mem); |
5043 %} |
5054 %} |
5044 |
5055 |
5045 // Load Integer with a 32-bit mask into Long Register |
5056 // Load Integer with a 31-bit mask into Long Register |
5046 instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{ |
5057 instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{ |
5047 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); |
5058 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); |
5048 effect(KILL cr); |
5059 effect(KILL cr); |
5049 |
5060 |
5050 format %{ "movl $dst, $mem\t# int & 32-bit mask -> long\n\t" |
5061 format %{ "movl $dst, $mem\t# int & 31-bit mask -> long\n\t" |
5051 "andl $dst, $mask" %} |
5062 "andl $dst, $mask" %} |
5052 ins_encode %{ |
5063 ins_encode %{ |
5053 Register Rdst = $dst$$Register; |
5064 Register Rdst = $dst$$Register; |
5054 __ movl(Rdst, $mem$$Address); |
5065 __ movl(Rdst, $mem$$Address); |
5055 __ andl(Rdst, $mask$$constant); |
5066 __ andl(Rdst, $mask$$constant); |