src/cpu/mips/vm/globals_mips.hpp

changeset 9459
814e9e335067
parent 9251
1ccc5a3b3671
child 9580
f10841009d27
equal deleted inserted replaced
9458:076aa91d2dd8 9459:814e9e335067
1 /* 1 /*
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. 3 * Copyright (c) 2015, 2019, Loongson Technology. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 * 5 *
6 * This code is free software; you can redistribute it and/or modify it 6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as 7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
108 product(intx, SetFSFOFN, 999, \ 108 product(intx, SetFSFOFN, 999, \
109 "Set the FS/FO/FN bits in FCSR" \ 109 "Set the FS/FO/FN bits in FCSR" \
110 "999 means FS/FO/FN will not be changed" \ 110 "999 means FS/FO/FN will not be changed" \
111 "=XYZ, with X:FS, Y:FO, Z:FN, X, Y and Z in 0=off, 1=on") \ 111 "=XYZ, with X:FS, Y:FO, Z:FN, X, Y and Z in 0=off, 1=on") \
112 \ 112 \
113 develop(bool, IEEEPrecision, true, \
114 "Enables IEEE precision (for INTEL only)") \
115 \
116 product(intx, FenceInstruction, 0, \ 113 product(intx, FenceInstruction, 0, \
117 "(Unsafe,Unstable) Experimental") \ 114 "(Unsafe,Unstable) Experimental") \
118 \ 115 \
119 product(intx, ReadPrefetchInstr, 0, \ 116 product(intx, ReadPrefetchInstr, 0, \
120 "Prefetch instruction to prefetch ahead") \ 117 "Prefetch instruction to prefetch ahead") \

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