src/cpu/ppc/vm/ppc.ad

changeset 6510
7c462558a08a
parent 6508
c4178a748df9
child 6511
31e80afe3fed
equal deleted inserted replaced
6509:2444afebe07b 6510:7c462558a08a
2074 const bool Matcher::match_rule_supported(int opcode) { 2074 const bool Matcher::match_rule_supported(int opcode) {
2075 if (!has_match_rule(opcode)) 2075 if (!has_match_rule(opcode))
2076 return false; 2076 return false;
2077 2077
2078 switch (opcode) { 2078 switch (opcode) {
2079 case Op_SqrtD:
2080 return VM_Version::has_fsqrt();
2079 case Op_CountLeadingZerosI: 2081 case Op_CountLeadingZerosI:
2080 case Op_CountLeadingZerosL: 2082 case Op_CountLeadingZerosL:
2081 case Op_CountTrailingZerosI: 2083 case Op_CountTrailingZerosI:
2082 case Op_CountTrailingZerosL: 2084 case Op_CountTrailingZerosL:
2083 if (!UseCountLeadingZerosInstructionsPPC64) 2085 if (!UseCountLeadingZerosInstructionsPPC64)
8738 __ fnabs($dst$$FloatRegister, $src$$FloatRegister); 8740 __ fnabs($dst$$FloatRegister, $src$$FloatRegister);
8739 %} 8741 %}
8740 ins_pipe(pipe_class_default); 8742 ins_pipe(pipe_class_default);
8741 %} 8743 %}
8742 8744
8743 // VM_Version::has_sqrt() decides if this node will be used. 8745 // VM_Version::has_fsqrt() decides if this node will be used.
8744 // Sqrt float double precision 8746 // Sqrt float double precision
8745 instruct sqrtD_reg(regD dst, regD src) %{ 8747 instruct sqrtD_reg(regD dst, regD src) %{
8746 match(Set dst (SqrtD src)); 8748 match(Set dst (SqrtD src));
8747 format %{ "FSQRT $dst, $src" %} 8749 format %{ "FSQRT $dst, $src" %}
8748 size(4); 8750 size(4);

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